From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: tsimpson@quicinc.com, richard.henderson@linaro.org,
philmd@linaro.org, ale@rev.ng, anjo@rev.ng, bcain@quicinc.com,
quic_mathbern@quicinc.com
Subject: [PATCH v2 2/8] Hexagon (target/hexagon) Remove PC from the runtime state
Date: Mon, 24 Oct 2022 16:51:11 -0700 [thread overview]
Message-ID: <20221024235117.3663-3-tsimpson@quicinc.com> (raw)
In-Reply-To: <20221024235117.3663-1-tsimpson@quicinc.com>
Add pc field to Packet structure
For helpers that need PC, pass an extra argument
Remove slot arg from conditional jump helpers
On a trap0, copy pkt->pc into hex_gpr[HEX_REG_PC]
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
target/hexagon/gen_tcg.h | 7 +++++++
target/hexagon/insn.h | 1 +
target/hexagon/macros.h | 2 +-
target/hexagon/translate.c | 9 +--------
target/hexagon/gen_helper_funcs.py | 4 ++++
target/hexagon/gen_helper_protos.py | 3 +++
target/hexagon/gen_tcg_funcs.py | 3 +++
target/hexagon/hex_common.py | 6 +++++-
8 files changed, 25 insertions(+), 10 deletions(-)
diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h
index 50634ac459..7f0ba27eb6 100644
--- a/target/hexagon/gen_tcg.h
+++ b/target/hexagon/gen_tcg.h
@@ -742,4 +742,11 @@
RsV = RsV; \
} while (0)
+#define fGEN_TCG_J2_trap0(SHORTCODE) \
+ do { \
+ uiV = uiV; \
+ tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], pkt->pc); \
+ TCGv excp = tcg_constant_tl(HEX_EXCP_TRAP0); \
+ gen_helper_raise_exception(cpu_env, excp); \
+ } while (0)
#endif
diff --git a/target/hexagon/insn.h b/target/hexagon/insn.h
index 857a7ceb75..b3260d1f0b 100644
--- a/target/hexagon/insn.h
+++ b/target/hexagon/insn.h
@@ -57,6 +57,7 @@ typedef struct Instruction Insn;
struct Packet {
uint16_t num_insns;
uint16_t encod_pkt_size_in_bytes;
+ uint32_t pc;
/* Pre-decodes about COF */
bool pkt_has_cof; /* Has any change-of-flow */
diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h
index e908405d82..469dfa5571 100644
--- a/target/hexagon/macros.h
+++ b/target/hexagon/macros.h
@@ -398,7 +398,7 @@ static inline TCGv gen_read_ireg(TCGv result, TCGv val, int shift)
#else
#define fREAD_GP() READ_REG(HEX_REG_GP)
#endif
-#define fREAD_PC() (READ_REG(HEX_REG_PC))
+#define fREAD_PC() (PC)
#define fREAD_NPC() (env->next_PC & (0xfffffffe))
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
index 2e46cc0680..fd4f0efa26 100644
--- a/target/hexagon/translate.c
+++ b/target/hexagon/translate.c
@@ -194,11 +194,6 @@ static bool check_for_attrib(Packet *pkt, int attrib)
return false;
}
-static bool need_pc(Packet *pkt)
-{
- return check_for_attrib(pkt, A_IMPLICIT_READS_PC);
-}
-
static bool need_slot_cancelled(Packet *pkt)
{
return check_for_attrib(pkt, A_CONDEXEC);
@@ -240,9 +235,6 @@ static void gen_start_packet(DisasContext *ctx, Packet *pkt)
}
/* Initialize the runtime state for packet semantics */
- if (need_pc(pkt)) {
- tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->base.pc_next);
- }
if (need_slot_cancelled(pkt)) {
tcg_gen_movi_tl(hex_slot_cancelled, 0);
}
@@ -768,6 +760,7 @@ static void decode_and_translate_packet(CPUHexagonState *env, DisasContext *ctx)
}
if (decode_packet(nwords, words, &pkt, false) > 0) {
+ pkt.pc = ctx->base.pc_next;
HEX_DEBUG_PRINT_PKT(&pkt);
gen_start_packet(ctx, &pkt);
for (i = 0; i < pkt.num_insns; i++) {
diff --git a/target/hexagon/gen_helper_funcs.py b/target/hexagon/gen_helper_funcs.py
index f7c1a82e9f..8ab144b20a 100755
--- a/target/hexagon/gen_helper_funcs.py
+++ b/target/hexagon/gen_helper_funcs.py
@@ -241,6 +241,10 @@ def gen_helper_function(f, tag, tagregs, tagimms):
if (hex_common.need_pkt_has_multi_cof(tag)):
f.write(", uint32_t pkt_has_multi_cof")
+ if hex_common.need_PC(tag):
+ if i > 0: f.write(", ")
+ f.write("target_ulong PC")
+ i += 1
if hex_common.need_slot(tag):
if i > 0: f.write(", ")
f.write("uint32_t slot")
diff --git a/target/hexagon/gen_helper_protos.py b/target/hexagon/gen_helper_protos.py
index 4530d7ba8d..2385717dda 100755
--- a/target/hexagon/gen_helper_protos.py
+++ b/target/hexagon/gen_helper_protos.py
@@ -85,6 +85,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms):
if hex_common.need_pkt_has_multi_cof(tag): def_helper_size += 1
if hex_common.need_part1(tag): def_helper_size += 1
if hex_common.need_slot(tag): def_helper_size += 1
+ if hex_common.need_PC(tag): def_helper_size += 1
f.write('DEF_HELPER_%s(%s' % (def_helper_size, tag))
## The return type is void
f.write(', void' )
@@ -93,6 +94,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms):
if hex_common.need_pkt_has_multi_cof(tag): def_helper_size += 1
if hex_common.need_part1(tag): def_helper_size += 1
if hex_common.need_slot(tag): def_helper_size += 1
+ if hex_common.need_PC(tag): def_helper_size += 1
f.write('DEF_HELPER_%s(%s' % (def_helper_size, tag))
## Generate the qemu DEF_HELPER type for each result
@@ -131,6 +133,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms):
## Add the arguments for the instruction pkt_has_multi_cof, slot and
## part1 (if needed)
if hex_common.need_pkt_has_multi_cof(tag): f.write(', i32')
+ if hex_common.need_PC(tag): f.write(', i32')
if hex_common.need_slot(tag): f.write(', i32' )
if hex_common.need_part1(tag): f.write(' , i32' )
f.write(')\n')
diff --git a/target/hexagon/gen_tcg_funcs.py b/target/hexagon/gen_tcg_funcs.py
index 67045c80bb..2225bb08da 100755
--- a/target/hexagon/gen_tcg_funcs.py
+++ b/target/hexagon/gen_tcg_funcs.py
@@ -622,6 +622,8 @@ def gen_tcg_func(f, tag, regs, imms):
f.write(" TCGv part1 = tcg_constant_tl(insn->part1);\n")
if hex_common.need_slot(tag):
f.write(" TCGv slot = tcg_constant_tl(insn->slot);\n")
+ if hex_common.need_PC(tag):
+ f.write(" TCGv PC = tcg_constant_tl(pkt->pc);\n")
f.write(" gen_helper_%s(" % (tag))
i=0
## If there is a scalar result, it is the return type
@@ -652,6 +654,7 @@ def gen_tcg_func(f, tag, regs, imms):
if hex_common.need_pkt_has_multi_cof(tag):
f.write(", pkt_has_multi_cof")
+ if hex_common.need_PC(tag): f.write(", PC")
if hex_common.need_slot(tag): f.write(", slot")
if hex_common.need_part1(tag): f.write(", part1" )
f.write(");\n")
diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py
index f5b58501db..cfe5fe7b35 100755
--- a/target/hexagon/hex_common.py
+++ b/target/hexagon/hex_common.py
@@ -194,7 +194,8 @@ def is_new_val(regtype, regid, tag):
return regtype+regid+'N' in semdict[tag]
def need_slot(tag):
- if ('A_CONDEXEC' in attribdict[tag] or
+ if (('A_CONDEXEC' in attribdict[tag] and
+ 'A_JUMP' not in attribdict[tag]) or
'A_STORE' in attribdict[tag] or
'A_LOAD' in attribdict[tag]):
return 1
@@ -207,6 +208,9 @@ def need_part1(tag):
def need_ea(tag):
return re.compile(r"\bEA\b").search(semdict[tag])
+def need_PC(tag):
+ return 'A_IMPLICIT_READS_PC' in attribdict[tag]
+
def need_pkt_has_multi_cof(tag):
return 'A_COF' in attribdict[tag]
--
2.17.1
next prev parent reply other threads:[~2022-10-24 23:57 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-24 23:51 [PATCH v2 0/8] Hexagon (target/hexagon) Improve change-of-flow Taylor Simpson
2022-10-24 23:51 ` [PATCH v2 1/8] Hexagon (target/hexagon) Only use branch_taken when packet has multi cof Taylor Simpson
2022-10-24 23:51 ` Taylor Simpson [this message]
2022-10-24 23:51 ` [PATCH v2 3/8] Hexagon (target/hexagon) Remove next_PC from runtime state Taylor Simpson
2022-10-24 23:51 ` [PATCH v2 4/8] Hexagon (target/hexagon) Add overrides for direct call instructions Taylor Simpson
2022-10-24 23:51 ` [PATCH v2 5/8] Hexagon (target/hexagon) Add overrides for compound compare and jump Taylor Simpson
2022-10-24 23:51 ` [PATCH v2 6/8] Hexagon (target/hexagon) Add overrides for various forms of jump Taylor Simpson
2022-10-24 23:51 ` [PATCH v2 7/8] Hexagon (target/hexagon) Use direct block chaining for direct jump/branch Taylor Simpson
2022-10-24 23:51 ` [PATCH v2 8/8] Hexagon (target/hexagon) Use direct block chaining for tight loops Taylor Simpson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221024235117.3663-3-tsimpson@quicinc.com \
--to=tsimpson@quicinc.com \
--cc=ale@rev.ng \
--cc=anjo@rev.ng \
--cc=bcain@quicinc.com \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=quic_mathbern@quicinc.com \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).