From: "Cédric Le Goater" <clg@kaod.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Joel Stanley" <joel@jms.id.au>,
"Alistair Francis" <alistair@alistair23.me>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
qemu-block@nongnu.org, "Patrick Williams" <patrick@stwcx.xyz>,
"Cédric Le Goater" <clg@kaod.org>
Subject: [PULL 06/16] hw/arm/aspeed: increase Bletchley memory size
Date: Tue, 25 Oct 2022 17:20:32 +0200 [thread overview]
Message-ID: <20221025152042.278287-7-clg@kaod.org> (raw)
In-Reply-To: <20221025152042.278287-1-clg@kaod.org>
From: Patrick Williams <patrick@stwcx.xyz>
For the PVT-class hardware we have increased the memory size of
this device to 2 GiB. Adjust the device model accordingly.
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20221007110529.3657749-1-patrick@stwcx.xyz>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/arm/aspeed.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index bc3ecdb6199e..bc5c1e167773 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -1330,6 +1330,13 @@ static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
aspeed_soc_num_cpus(amc->soc_name);
};
+/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
+#if HOST_LONG_BITS == 32
+#define BLETCHLEY_BMC_RAM_SIZE (1 * GiB)
+#else
+#define BLETCHLEY_BMC_RAM_SIZE (2 * GiB)
+#endif
+
static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -1344,7 +1351,7 @@ static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
amc->num_cs = 2;
amc->macs_mask = ASPEED_MAC2_ON;
amc->i2c_init = bletchley_bmc_i2c_init;
- mc->default_ram_size = 512 * MiB;
+ mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE;
mc->default_cpus = mc->min_cpus = mc->max_cpus =
aspeed_soc_num_cpus(amc->soc_name);
}
--
2.37.3
next prev parent reply other threads:[~2022-10-25 15:34 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-25 15:20 [PULL 00/16] aspeed queue Cédric Le Goater
2022-10-25 15:20 ` [PULL 01/16] hw/i2c/aspeed: Fix old reg slave receive Cédric Le Goater
2022-10-25 15:20 ` [PULL 02/16] tests/avocado/machine_aspeed.py: Fix typos on buildroot Cédric Le Goater
2022-10-25 15:20 ` [PULL 03/16] ssi: cache SSIPeripheralClass to avoid GET_CLASS() Cédric Le Goater
2023-05-12 4:02 ` Philippe Mathieu-Daudé
2022-10-25 15:20 ` [PULL 04/16] aspeed/smc: Cache AspeedSMCClass Cédric Le Goater
2023-05-12 4:00 ` Philippe Mathieu-Daudé
2023-05-12 7:06 ` Cédric Le Goater
2022-10-25 15:20 ` [PULL 05/16] ast2600: Drop NEON from the CPU features Cédric Le Goater
2022-10-25 15:20 ` Cédric Le Goater [this message]
2022-10-25 15:20 ` [PULL 07/16] m25p80: Add basic support for the SFDP command Cédric Le Goater
2022-10-25 15:20 ` [PULL 08/16] m25p80: Add the n25q256a SFDP table Cédric Le Goater
2022-10-25 15:20 ` [PULL 09/16] m25p80: Add erase size for mx25l25635e Cédric Le Goater
2022-10-25 15:20 ` [PULL 10/16] m25p80: Add the mx25l25635e SFPD table Cédric Le Goater
2022-10-25 15:20 ` [PULL 11/16] m25p80: Add the mx25l25635f " Cédric Le Goater
2022-10-25 15:20 ` [PULL 12/16] m25p80: Add the mx66l1g45g SFDP table Cédric Le Goater
2022-10-25 15:20 ` [PULL 13/16] m25p80: Add the w25q256 SFPD table Cédric Le Goater
2022-10-25 15:20 ` [PULL 14/16] m25p80: Add the w25q512jv " Cédric Le Goater
2022-10-25 15:20 ` [PULL 15/16] m25p80: Add the w25q01jvq " Cédric Le Goater
2022-10-25 15:20 ` [PULL 16/16] arm/aspeed: Replace mx25l25635e chip model Cédric Le Goater
2022-10-26 18:54 ` [PULL 00/16] aspeed queue Stefan Hajnoczi
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