* [PATCH v3 1/2] arm/kvm: add support for MTE
2022-10-26 16:05 [PATCH v3 0/2] arm: enable MTE for QEMU + kvm Cornelia Huck
@ 2022-10-26 16:05 ` Cornelia Huck
2022-10-26 16:05 ` [PATCH v3 2/2] qtests/arm: add some mte tests Cornelia Huck
2022-12-20 13:00 ` [PATCH v3 0/2] arm: enable MTE for QEMU + kvm Cornelia Huck
2 siblings, 0 replies; 6+ messages in thread
From: Cornelia Huck @ 2022-10-26 16:05 UTC (permalink / raw)
To: Peter Maydell, Thomas Huth, Laurent Vivier
Cc: qemu-arm, qemu-devel, kvm, Eric Auger, Dr. David Alan Gilbert,
Juan Quintela, Gavin Shan, Cornelia Huck
Introduce a new cpu feature flag to control MTE support. To preserve
backwards compatibility for tcg, MTE will continue to be enabled as
long as tag memory has been provided.
If MTE has been enabled, we need to disable migration, as we do not
yet have a way to migrate the tags as well. Therefore, MTE will stay
off with KVM unless requested explicitly.
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
---
docs/system/arm/cpu-features.rst | 21 +++++
target/arm/cpu.c | 18 ++---
target/arm/cpu.h | 1 +
target/arm/cpu64.c | 133 +++++++++++++++++++++++++++++++
target/arm/internals.h | 1 +
target/arm/kvm64.c | 5 ++
target/arm/kvm_arm.h | 12 +++
target/arm/monitor.c | 1 +
8 files changed, 180 insertions(+), 12 deletions(-)
diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-features.rst
index c2c01ec7d265..9e35b70138d0 100644
--- a/docs/system/arm/cpu-features.rst
+++ b/docs/system/arm/cpu-features.rst
@@ -443,3 +443,24 @@ As with ``sve-default-vector-length``, if the default length is larger
than the maximum vector length enabled, the actual vector length will
be reduced. If this property is set to ``-1`` then the default vector
length is set to the maximum possible length.
+
+MTE CPU Property
+================
+
+The ``mte`` property controls the Memory Tagging Extension. For TCG, it requires
+presence of tag memory (which can be turned on for the ``virt`` machine via
+``mte=on``). For KVM, it requires the ``KVM_CAP_ARM_MTE`` capability; until
+proper migration support is implemented, enabling MTE will install a migration
+blocker.
+
+If not specified explicitly via ``on`` or ``off``, MTE will be available
+according to the following rules:
+
+* When TCG is used, MTE will be available iff tag memory is available; i.e. it
+ preserves the behaviour prior to introduction of the feature.
+
+* When KVM is used, MTE will default to off, so that migration will not
+ unintentionally be blocked.
+
+* Other accelerators currently don't support MTE.
+
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 94ca6f163f78..2425473e1ced 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1479,6 +1479,11 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)
error_propagate(errp, local_err);
return;
}
+ arm_cpu_mte_finalize(cpu, &local_err);
+ if (local_err != NULL) {
+ error_propagate(errp, local_err);
+ return;
+ }
}
#endif
@@ -1555,7 +1560,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
}
if (cpu->tag_memory) {
error_setg(errp,
- "Cannot enable %s when guest CPUs has MTE enabled",
+ "Cannot enable %s when guest CPUs has tag memory enabled",
current_accel_name());
return;
}
@@ -1934,17 +1939,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
ID_PFR1, VIRTUALIZATION, 0);
}
-#ifndef CONFIG_USER_ONLY
- if (cpu->tag_memory == NULL && cpu_isar_feature(aa64_mte, cpu)) {
- /*
- * Disable the MTE feature bits if we do not have tag-memory
- * provided by the machine.
- */
- cpu->isar.id_aa64pfr1 =
- FIELD_DP64(cpu->isar.id_aa64pfr1, ID_AA64PFR1, MTE, 0);
- }
-#endif
-
if (tcg_enabled()) {
/*
* Don't report the Statistical Profiling Extension in the ID
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index e3dbef5be865..53d1efdf9a76 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1027,6 +1027,7 @@ struct ArchCPU {
bool prop_pauth;
bool prop_pauth_impdef;
bool prop_lpa2;
+ OnOffAuto prop_mte;
/* DCZ blocksize, in log_2(words), ie low 4 bits of DCZID_EL0 */
uint32_t dcz_blocksize;
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 85e0d1daf1c7..c81cf8932407 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -35,6 +35,13 @@
#include "qapi/visitor.h"
#include "hw/qdev-properties.h"
#include "internals.h"
+#include "migration/blocker.h"
+#include "qapi/qapi-visit-common.h"
+#include "hw/arm/virt.h"
+
+#ifdef CONFIG_KVM
+static Error *mte_migration_blocker;
+#endif
static void aarch64_a35_initfn(Object *obj)
{
@@ -1034,6 +1041,130 @@ static void aarch64_neoverse_n1_initfn(Object *obj)
cpu->isar.reset_pmcr_el0 = 0x410c3000;
}
+static void aarch64_cpu_get_mte(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ OnOffAuto mte = cpu->prop_mte;
+
+ visit_type_OnOffAuto(v, name, &mte, errp);
+}
+
+static void aarch64_cpu_set_mte(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ visit_type_OnOffAuto(v, name, &cpu->prop_mte, errp);
+
+}
+
+static void aarch64_add_mte_properties(Object *obj)
+{
+ /*
+ * For tcg, "AUTO" means turn on mte if tag memory has been provided, and
+ * turn it off (without error) if not.
+ * For kvm, "AUTO" currently means mte off, as migration is not supported
+ * yet.
+ * For all others, "AUTO" means mte off.
+ */
+ object_property_add(obj, "mte", "OnOffAuto", aarch64_cpu_get_mte,
+ aarch64_cpu_set_mte, NULL, NULL);
+}
+
+static inline bool arm_machine_has_tag_memory(void)
+{
+#ifndef CONFIG_USER_ONLY
+ Object *obj = object_dynamic_cast(qdev_get_machine(), TYPE_VIRT_MACHINE);
+
+ /* so far, only the virt machine has support for tag memory */
+ if (obj) {
+ VirtMachineState *vms = VIRT_MACHINE(obj);
+
+ return vms->mte;
+ }
+#endif
+ return false;
+}
+
+void arm_cpu_mte_finalize(ARMCPU *cpu, Error **errp)
+{
+ bool enable_mte;
+
+ switch (cpu->prop_mte) {
+ case ON_OFF_AUTO_OFF:
+ enable_mte = false;
+ break;
+ case ON_OFF_AUTO_ON:
+ if (!kvm_enabled()) {
+ if (cpu_isar_feature(aa64_mte, cpu)) {
+ if (!arm_machine_has_tag_memory()) {
+ error_setg(errp, "mte=on requires tag memory");
+ return;
+ }
+ } else {
+ error_setg(errp, "mte not provided");
+ return;
+ }
+ }
+#ifdef CONFIG_KVM
+ if (kvm_enabled() && !kvm_arm_mte_supported()) {
+ error_setg(errp, "mte not supported by kvm");
+ return;
+ }
+#endif
+ enable_mte = true;
+ break;
+ default: /* AUTO */
+ if (!kvm_enabled()) {
+ if (cpu_isar_feature(aa64_mte, cpu)) {
+ /*
+ * Tie mte enablement to presence of tag memory, in order to
+ * preserve pre-existing behaviour.
+ */
+ enable_mte = arm_machine_has_tag_memory();
+ } else {
+ enable_mte = false;
+ }
+ break;
+ } else {
+ /*
+ * This cannot yet be
+ * enable_mte = kvm_arm_mte_supported();
+ * as we don't support migration yet.
+ */
+ enable_mte = false;
+ }
+ }
+
+ if (!enable_mte) {
+ /* Disable MTE feature bits. */
+ cpu->isar.id_aa64pfr1 =
+ FIELD_DP64(cpu->isar.id_aa64pfr1, ID_AA64PFR1, MTE, 0);
+ return;
+ }
+
+ /* accelerator-specific enablement */
+ if (kvm_enabled()) {
+#ifdef CONFIG_KVM
+ if (kvm_vm_enable_cap(kvm_state, KVM_CAP_ARM_MTE, 0)) {
+ error_setg(errp, "Failed to enable KVM_CAP_ARM_MTE");
+ } else {
+ /* TODO: add proper migration support with MTE enabled */
+ if (!mte_migration_blocker) {
+ error_setg(&mte_migration_blocker,
+ "Live migration disabled due to MTE enabled");
+ if (migrate_add_blocker(mte_migration_blocker, NULL)) {
+ error_setg(errp, "Failed to add MTE migration blocker");
+ error_free(mte_migration_blocker);
+ mte_migration_blocker = NULL;
+ }
+ }
+ }
+#endif
+ }
+}
+
static void aarch64_host_initfn(Object *obj)
{
#if defined(CONFIG_KVM)
@@ -1042,6 +1173,7 @@ static void aarch64_host_initfn(Object *obj)
if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
aarch64_add_sve_properties(obj);
aarch64_add_pauth_properties(obj);
+ aarch64_add_mte_properties(obj);
}
#elif defined(CONFIG_HVF)
ARMCPU *cpu = ARM_CPU(obj);
@@ -1235,6 +1367,7 @@ static void aarch64_max_initfn(Object *obj)
object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq,
cpu_max_set_sve_max_vq, NULL, NULL);
qdev_property_add_static(DEVICE(obj), &arm_cpu_lpa2_property);
+ aarch64_add_mte_properties(obj);
}
static const ARMCPUInfo aarch64_cpus[] = {
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 9566364dcaed..e5d46e9e3935 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1313,6 +1313,7 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp);
void arm_cpu_sme_finalize(ARMCPU *cpu, Error **errp);
void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp);
+void arm_cpu_mte_finalize(ARMCPU *cpu, Error **errp);
#endif
#ifdef CONFIG_USER_ONLY
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 1197253d12f7..b777bd0a11d2 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -764,6 +764,11 @@ bool kvm_arm_steal_time_supported(void)
return kvm_check_extension(kvm_state, KVM_CAP_STEAL_TIME);
}
+bool kvm_arm_mte_supported(void)
+{
+ return kvm_check_extension(kvm_state, KVM_CAP_ARM_MTE);
+}
+
QEMU_BUILD_BUG_ON(KVM_ARM64_SVE_VQ_MIN != 1);
uint32_t kvm_arm_sve_get_vls(CPUState *cs)
diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index 99017b635ce4..762443f8a7c0 100644
--- a/target/arm/kvm_arm.h
+++ b/target/arm/kvm_arm.h
@@ -305,6 +305,13 @@ bool kvm_arm_pmu_supported(void);
*/
bool kvm_arm_sve_supported(void);
+/**
+ * kvm_arm_mte_supported:
+ *
+ * Returns: true if KVM can enable MTE, and false otherwise.
+ */
+bool kvm_arm_mte_supported(void);
+
/**
* kvm_arm_get_max_vm_ipa_size:
* @ms: Machine state handle
@@ -395,6 +402,11 @@ static inline bool kvm_arm_steal_time_supported(void)
return false;
}
+static inline bool kvm_arm_mte_supported(void)
+{
+ return false;
+}
+
/*
* These functions should never actually be called without KVM support.
*/
diff --git a/target/arm/monitor.c b/target/arm/monitor.c
index 80c64fa3556d..f13ff2664b67 100644
--- a/target/arm/monitor.c
+++ b/target/arm/monitor.c
@@ -96,6 +96,7 @@ static const char *cpu_model_advertised_features[] = {
"sve1408", "sve1536", "sve1664", "sve1792", "sve1920", "sve2048",
"kvm-no-adjvtime", "kvm-steal-time",
"pauth", "pauth-impdef",
+ "mte",
NULL
};
--
2.37.3
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v3 2/2] qtests/arm: add some mte tests
2022-10-26 16:05 [PATCH v3 0/2] arm: enable MTE for QEMU + kvm Cornelia Huck
2022-10-26 16:05 ` [PATCH v3 1/2] arm/kvm: add support for MTE Cornelia Huck
@ 2022-10-26 16:05 ` Cornelia Huck
2022-10-27 6:42 ` Thomas Huth
2022-12-20 13:00 ` [PATCH v3 0/2] arm: enable MTE for QEMU + kvm Cornelia Huck
2 siblings, 1 reply; 6+ messages in thread
From: Cornelia Huck @ 2022-10-26 16:05 UTC (permalink / raw)
To: Peter Maydell, Thomas Huth, Laurent Vivier
Cc: qemu-arm, qemu-devel, kvm, Eric Auger, Dr. David Alan Gilbert,
Juan Quintela, Gavin Shan, Cornelia Huck
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
---
tests/qtest/arm-cpu-features.c | 76 ++++++++++++++++++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c
index 5a145273860c..e264d2178a8b 100644
--- a/tests/qtest/arm-cpu-features.c
+++ b/tests/qtest/arm-cpu-features.c
@@ -22,6 +22,7 @@
#define MACHINE "-machine virt,gic-version=max -accel tcg "
#define MACHINE_KVM "-machine virt,gic-version=max -accel kvm -accel tcg "
+#define MACHINE_MTE "-machine virt,gic-version=max,mte=on -accel tcg "
#define QUERY_HEAD "{ 'execute': 'query-cpu-model-expansion', " \
" 'arguments': { 'type': 'full', "
#define QUERY_TAIL "}}"
@@ -155,6 +156,18 @@ static bool resp_get_feature(QDict *resp, const char *feature)
g_assert(qdict_get_bool(_props, feature) == (expected_value)); \
})
+#define resp_assert_feature_str(resp, feature, expected_value) \
+({ \
+ QDict *_props; \
+ \
+ g_assert(_resp); \
+ g_assert(resp_has_props(_resp)); \
+ _props = resp_get_props(_resp); \
+ g_assert(qdict_get(_props, feature)); \
+ g_assert_cmpstr(qdict_get_try_str(_props, feature), ==, \
+ expected_value); \
+})
+
#define assert_feature(qts, cpu_type, feature, expected_value) \
({ \
QDict *_resp; \
@@ -165,6 +178,16 @@ static bool resp_get_feature(QDict *resp, const char *feature)
qobject_unref(_resp); \
})
+#define assert_feature_str(qts, cpu_type, feature, expected_value) \
+({ \
+ QDict *_resp; \
+ \
+ _resp = do_query_no_props(qts, cpu_type); \
+ g_assert(_resp); \
+ resp_assert_feature_str(_resp, feature, expected_value); \
+ qobject_unref(_resp); \
+})
+
#define assert_set_feature(qts, cpu_type, feature, value) \
({ \
const char *_fmt = (value) ? "{ %s: true }" : "{ %s: false }"; \
@@ -176,6 +199,16 @@ static bool resp_get_feature(QDict *resp, const char *feature)
qobject_unref(_resp); \
})
+#define assert_set_feature_str(qts, cpu_type, feature, value, _fmt) \
+({ \
+ QDict *_resp; \
+ \
+ _resp = do_query(qts, cpu_type, _fmt, feature); \
+ g_assert(_resp); \
+ resp_assert_feature_str(_resp, feature, value); \
+ qobject_unref(_resp); \
+})
+
#define assert_has_feature_enabled(qts, cpu_type, feature) \
assert_feature(qts, cpu_type, feature, true)
@@ -412,6 +445,24 @@ static void sve_tests_sve_off_kvm(const void *data)
qtest_quit(qts);
}
+static void mte_tests_tag_memory_on(const void *data)
+{
+ QTestState *qts;
+
+ qts = qtest_init(MACHINE_MTE "-cpu max");
+
+ /*
+ * With tag memory, "mte" should default to on, and explicitly specifying
+ * either on or off should be fine.
+ */
+ assert_has_feature(qts, "max", "mte");
+
+ assert_set_feature_str(qts, "max", "mte", "off", "{ 'mte': 'off' }");
+ assert_set_feature_str(qts, "max", "mte", "on", "{ 'mte': 'on' }");
+
+ qtest_quit(qts);
+}
+
static void pauth_tests_default(QTestState *qts, const char *cpu_type)
{
assert_has_feature_enabled(qts, cpu_type, "pauth");
@@ -424,6 +475,21 @@ static void pauth_tests_default(QTestState *qts, const char *cpu_type)
"{ 'pauth': false, 'pauth-impdef': true }");
}
+static void mte_tests_default(QTestState *qts, const char *cpu_type)
+{
+ assert_has_feature(qts, cpu_type, "mte");
+
+ /*
+ * Without tag memory, mte will be off under tcg.
+ * Explicitly enabling it yields an error.
+ */
+ assert_has_feature(qts, cpu_type, "mte");
+
+ assert_set_feature_str(qts, "max", "mte", "off", "{ 'mte': 'off' }");
+ assert_error(qts, cpu_type, "mte=on requires tag memory",
+ "{ 'mte': 'on' }");
+}
+
static void test_query_cpu_model_expansion(const void *data)
{
QTestState *qts;
@@ -473,6 +539,7 @@ static void test_query_cpu_model_expansion(const void *data)
sve_tests_default(qts, "max");
pauth_tests_default(qts, "max");
+ mte_tests_default(qts, "max");
/* Test that features that depend on KVM generate errors without. */
assert_error(qts, "max",
@@ -516,6 +583,13 @@ static void test_query_cpu_model_expansion_kvm(const void *data)
assert_set_feature(qts, "host", "pmu", false);
assert_set_feature(qts, "host", "pmu", true);
+ /*
+ * Unfortunately, there's no easy way to test whether this instance
+ * of KVM supports MTE. So we can only assert that the feature
+ * is present, but not whether it can be toggled.
+ */
+ assert_has_feature(qts, "host", "mte");
+
/*
* Some features would be enabled by default, but they're disabled
* because this instance of KVM doesn't support them. Test that the
@@ -630,6 +704,8 @@ int main(int argc, char **argv)
NULL, sve_tests_sve_off);
qtest_add_data_func("/arm/kvm/query-cpu-model-expansion/sve-off",
NULL, sve_tests_sve_off_kvm);
+ qtest_add_data_func("/arm/max/query-cpu-model-expansion/tag-memory",
+ NULL, mte_tests_tag_memory_on);
}
return g_test_run();
--
2.37.3
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v3 2/2] qtests/arm: add some mte tests
2022-10-26 16:05 ` [PATCH v3 2/2] qtests/arm: add some mte tests Cornelia Huck
@ 2022-10-27 6:42 ` Thomas Huth
2022-10-27 10:26 ` Cornelia Huck
0 siblings, 1 reply; 6+ messages in thread
From: Thomas Huth @ 2022-10-27 6:42 UTC (permalink / raw)
To: Cornelia Huck, Peter Maydell, Laurent Vivier
Cc: qemu-arm, qemu-devel, kvm, Eric Auger, Dr. David Alan Gilbert,
Juan Quintela, Gavin Shan
On 26/10/2022 18.05, Cornelia Huck wrote:
> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
> ---
> tests/qtest/arm-cpu-features.c | 76 ++++++++++++++++++++++++++++++++++
> 1 file changed, 76 insertions(+)
>
> diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c
> index 5a145273860c..e264d2178a8b 100644
> --- a/tests/qtest/arm-cpu-features.c
> +++ b/tests/qtest/arm-cpu-features.c
> @@ -22,6 +22,7 @@
>
> #define MACHINE "-machine virt,gic-version=max -accel tcg "
> #define MACHINE_KVM "-machine virt,gic-version=max -accel kvm -accel tcg "
> +#define MACHINE_MTE "-machine virt,gic-version=max,mte=on -accel tcg "
> #define QUERY_HEAD "{ 'execute': 'query-cpu-model-expansion', " \
> " 'arguments': { 'type': 'full', "
> #define QUERY_TAIL "}}"
> @@ -155,6 +156,18 @@ static bool resp_get_feature(QDict *resp, const char *feature)
> g_assert(qdict_get_bool(_props, feature) == (expected_value)); \
> })
>
> +#define resp_assert_feature_str(resp, feature, expected_value) \
> +({ \
> + QDict *_props; \
> + \
> + g_assert(_resp); \
> + g_assert(resp_has_props(_resp)); \
> + _props = resp_get_props(_resp); \
> + g_assert(qdict_get(_props, feature)); \
> + g_assert_cmpstr(qdict_get_try_str(_props, feature), ==, \
> + expected_value); \
> +})
> +
> #define assert_feature(qts, cpu_type, feature, expected_value) \
> ({ \
> QDict *_resp; \
> @@ -165,6 +178,16 @@ static bool resp_get_feature(QDict *resp, const char *feature)
> qobject_unref(_resp); \
> })
>
> +#define assert_feature_str(qts, cpu_type, feature, expected_value) \
> +({ \
> + QDict *_resp; \
> + \
> + _resp = do_query_no_props(qts, cpu_type); \
> + g_assert(_resp); \
> + resp_assert_feature_str(_resp, feature, expected_value); \
> + qobject_unref(_resp); \
> +})
> +
> #define assert_set_feature(qts, cpu_type, feature, value) \
> ({ \
> const char *_fmt = (value) ? "{ %s: true }" : "{ %s: false }"; \
> @@ -176,6 +199,16 @@ static bool resp_get_feature(QDict *resp, const char *feature)
> qobject_unref(_resp); \
> })
>
> +#define assert_set_feature_str(qts, cpu_type, feature, value, _fmt) \
> +({ \
> + QDict *_resp; \
> + \
> + _resp = do_query(qts, cpu_type, _fmt, feature); \
> + g_assert(_resp); \
> + resp_assert_feature_str(_resp, feature, value); \
> + qobject_unref(_resp); \
> +})
> +
> #define assert_has_feature_enabled(qts, cpu_type, feature) \
> assert_feature(qts, cpu_type, feature, true)
>
> @@ -412,6 +445,24 @@ static void sve_tests_sve_off_kvm(const void *data)
> qtest_quit(qts);
> }
>
> +static void mte_tests_tag_memory_on(const void *data)
> +{
> + QTestState *qts;
> +
> + qts = qtest_init(MACHINE_MTE "-cpu max");
> +
> + /*
> + * With tag memory, "mte" should default to on, and explicitly specifying
> + * either on or off should be fine.
> + */
> + assert_has_feature(qts, "max", "mte");
> +
> + assert_set_feature_str(qts, "max", "mte", "off", "{ 'mte': 'off' }");
> + assert_set_feature_str(qts, "max", "mte", "on", "{ 'mte': 'on' }");
> +
> + qtest_quit(qts);
> +}
> +
> static void pauth_tests_default(QTestState *qts, const char *cpu_type)
> {
> assert_has_feature_enabled(qts, cpu_type, "pauth");
> @@ -424,6 +475,21 @@ static void pauth_tests_default(QTestState *qts, const char *cpu_type)
> "{ 'pauth': false, 'pauth-impdef': true }");
> }
>
> +static void mte_tests_default(QTestState *qts, const char *cpu_type)
> +{
> + assert_has_feature(qts, cpu_type, "mte");
> +
> + /*
> + * Without tag memory, mte will be off under tcg.
> + * Explicitly enabling it yields an error.
> + */
> + assert_has_feature(qts, cpu_type, "mte");
> +
> + assert_set_feature_str(qts, "max", "mte", "off", "{ 'mte': 'off' }");
> + assert_error(qts, cpu_type, "mte=on requires tag memory",
> + "{ 'mte': 'on' }");
> +}
> +
> static void test_query_cpu_model_expansion(const void *data)
> {
> QTestState *qts;
> @@ -473,6 +539,7 @@ static void test_query_cpu_model_expansion(const void *data)
>
> sve_tests_default(qts, "max");
> pauth_tests_default(qts, "max");
> + mte_tests_default(qts, "max");
>
> /* Test that features that depend on KVM generate errors without. */
> assert_error(qts, "max",
> @@ -516,6 +583,13 @@ static void test_query_cpu_model_expansion_kvm(const void *data)
> assert_set_feature(qts, "host", "pmu", false);
> assert_set_feature(qts, "host", "pmu", true);
>
> + /*
> + * Unfortunately, there's no easy way to test whether this instance
> + * of KVM supports MTE. So we can only assert that the feature
> + * is present, but not whether it can be toggled.
> + */
> + assert_has_feature(qts, "host", "mte");
> +
> /*
> * Some features would be enabled by default, but they're disabled
> * because this instance of KVM doesn't support them. Test that the
> @@ -630,6 +704,8 @@ int main(int argc, char **argv)
> NULL, sve_tests_sve_off);
> qtest_add_data_func("/arm/kvm/query-cpu-model-expansion/sve-off",
> NULL, sve_tests_sve_off_kvm);
> + qtest_add_data_func("/arm/max/query-cpu-model-expansion/tag-memory",
> + NULL, mte_tests_tag_memory_on);
Is it already possible to compile qemu-system-aarch64 with --disable-tcg ?
If so, I'd recommend a qtest_has_accel("tcg") here ... but apart from that:
Acked-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH v3 2/2] qtests/arm: add some mte tests
2022-10-27 6:42 ` Thomas Huth
@ 2022-10-27 10:26 ` Cornelia Huck
0 siblings, 0 replies; 6+ messages in thread
From: Cornelia Huck @ 2022-10-27 10:26 UTC (permalink / raw)
To: Thomas Huth, Peter Maydell, Laurent Vivier
Cc: qemu-arm, qemu-devel, kvm, Eric Auger, Dr. David Alan Gilbert,
Juan Quintela, Gavin Shan
On Thu, Oct 27 2022, Thomas Huth <thuth@redhat.com> wrote:
> On 26/10/2022 18.05, Cornelia Huck wrote:
>> + qtest_add_data_func("/arm/max/query-cpu-model-expansion/tag-memory",
>> + NULL, mte_tests_tag_memory_on);
>
> Is it already possible to compile qemu-system-aarch64 with --disable-tcg ?
Not yet, the code is too entangled... I tried a bit ago, but didn't make
much progress (on my todo list, but won't mind someone else doing it :)
> If so, I'd recommend a qtest_has_accel("tcg") here ... but apart from that:
>
> Acked-by: Thomas Huth <thuth@redhat.com>
Thanks!
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 0/2] arm: enable MTE for QEMU + kvm
2022-10-26 16:05 [PATCH v3 0/2] arm: enable MTE for QEMU + kvm Cornelia Huck
2022-10-26 16:05 ` [PATCH v3 1/2] arm/kvm: add support for MTE Cornelia Huck
2022-10-26 16:05 ` [PATCH v3 2/2] qtests/arm: add some mte tests Cornelia Huck
@ 2022-12-20 13:00 ` Cornelia Huck
2 siblings, 0 replies; 6+ messages in thread
From: Cornelia Huck @ 2022-12-20 13:00 UTC (permalink / raw)
To: Peter Maydell, Thomas Huth, Laurent Vivier
Cc: qemu-arm, qemu-devel, kvm, Eric Auger, Dr. David Alan Gilbert,
Juan Quintela, Gavin Shan
On Wed, Oct 26 2022, Cornelia Huck <cohuck@redhat.com> wrote:
> After wayyy too long (last version was sent in *July*), a respin of my
> kvm/mte series. Still no migration support. I've been hacking around on
> a device for transferring tags while stopped, but don't really have anything
> to show, probably because I get distra- <ohh, what's that?>
>
> ...I guess you get the point :(
>
> Anyway, I wanted to post this as non-RFC; likely too late for 7.2, but maybe
> for 8.0 (and I'd get a chance to make at least pre-copy migration work; I'm open
> to suggestions for that. Support for post-copy needs kernel-side changes.) Tested
> on the FVP models; qtests only on a non-MTE KVM host.
>
> Changes v2->v3:
> - rebase to current master
> - drop some parts of the qtests that didn't actually work
> - really minor stuff
> - drop RFC
>
> Cornelia Huck (2):
> arm/kvm: add support for MTE
> qtests/arm: add some mte tests
>
> docs/system/arm/cpu-features.rst | 21 +++++
> target/arm/cpu.c | 18 ++---
> target/arm/cpu.h | 1 +
> target/arm/cpu64.c | 133 +++++++++++++++++++++++++++++++
> target/arm/internals.h | 1 +
> target/arm/kvm64.c | 5 ++
> target/arm/kvm_arm.h | 12 +++
> target/arm/monitor.c | 1 +
> tests/qtest/arm-cpu-features.c | 76 ++++++++++++++++++
> 9 files changed, 256 insertions(+), 12 deletions(-)
>
Friendly ping, as 7.2 has been released now... this should still apply
without problems AFAICS. I can also respin, if needed.
^ permalink raw reply [flat|nested] 6+ messages in thread