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Tsirkin" To: Gregory Price Cc: Gregory Price , "qemu-devel@nongnu.org" , "jonathan.cameron@huawei.com" , "linux-cxl@vger.kernel.org" , "alison.schofield@intel.com" , "dave@stgolabs.net" , "a.manzanares@samsung.com" , "bwidawsk@kernel.org" Subject: Re: [PATCH 1/2] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL Message-ID: <20221026161044-mutt-send-email-mst@kernel.org> References: <20221006233702.18532-1-gregory.price@memverge.com> <20221026160545-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.515, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org He does but in the end he sends patches not pull requests. I don't care really as long as someone will send it up. On Wed, Oct 26, 2022 at 08:09:45PM +0000, Gregory Price wrote: > I believe this was dropped from my line because Jonathan carried a similar commit on his branch. > > Happy to push it up again as a separate commit if that is what you want. > > Noted for the future on upstreams > > -----Original Message----- > From: Michael S. Tsirkin > Sent: Wednesday, October 26, 2022 4:06 PM > To: Gregory Price > Cc: qemu-devel@nongnu.org; jonathan.cameron@huawei.com; linux-cxl@vger.kernel.org; alison.schofield@intel.com; dave@stgolabs.net; a.manzanares@samsung.com; bwidawsk@kernel.org; Gregory Price > Subject: Re: [PATCH 1/2] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL > > On Thu, Oct 06, 2022 at 07:37:01PM -0400, Gregory Price wrote: > > Current code sets to STORAGE_EXPRESS and then overrides it. > > > > Signed-off-by: Gregory Price > > If you expect me to merge it you need to CC me. > Also, do we need this separately from the series? > > > --- > > hw/mem/cxl_type3.c | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index > > ada2108fac..1837c1c83a 100644 > > --- a/hw/mem/cxl_type3.c > > +++ b/hw/mem/cxl_type3.c > > @@ -146,7 +146,6 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp) > > } > > > > pci_config_set_prog_interface(pci_conf, 0x10); > > - pci_config_set_class(pci_conf, PCI_CLASS_MEMORY_CXL); > > > > pcie_endpoint_cap_init(pci_dev, 0x80); > > cxl_cstate->dvsec_offset = 0x100; @@ -335,7 +334,7 @@ static void > > ct3_class_init(ObjectClass *oc, void *data) > > > > pc->realize = ct3_realize; > > pc->exit = ct3_exit; > > - pc->class_id = PCI_CLASS_STORAGE_EXPRESS; > > + pc->class_id = PCI_CLASS_MEMORY_CXL; > > pc->vendor_id = PCI_VENDOR_ID_INTEL; > > pc->device_id = 0xd93; /* LVF for now */ > > pc->revision = 1; > > -- > > 2.37.3 > > > >