From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Bernhard Beschow <shentey@gmail.com>, qemu-devel@nongnu.org
Cc: "Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Hervé Poussineau" <hpoussin@reactos.org>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 1/3] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition
Date: Wed, 26 Oct 2022 21:46:17 +0200 [thread overview]
Message-ID: <20221026194619.28880-2-philmd@linaro.org> (raw)
In-Reply-To: <20221026194619.28880-1-philmd@linaro.org>
The PIIX4 PCI-ISA bridge function is always located at 10:0.
Since we want to re-use its address, add the PIIX4_PCI_DEVFN
definition.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/mips/malta.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 272d93eea7..df0f448b67 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -72,6 +72,8 @@
#define MAX_IDE_BUS 2
+#define PIIX4_PCI_DEVFN PCI_DEVFN(10, 0)
+
typedef struct {
MemoryRegion iomem;
MemoryRegion iomem_lo; /* 0 - 0x900 */
@@ -1377,7 +1379,7 @@ void mips_malta_init(MachineState *machine)
empty_slot_init("GT64120", 0, 0x20000000);
/* Southbridge */
- piix4 = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), true,
+ piix4 = pci_create_simple_multifunction(pci_bus, PIIX4_PCI_DEVFN, true,
TYPE_PIIX4_PCI_DEVICE);
dev = DEVICE(piix4);
isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
--
2.37.3
next prev parent reply other threads:[~2022-10-26 19:49 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-26 19:46 [PATCH 0/3] hw/isa/piix4: Remove MIPS Malta specific bits Philippe Mathieu-Daudé
2022-10-26 19:46 ` Philippe Mathieu-Daudé [this message]
2022-10-26 19:46 ` [PATCH 2/3] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader Philippe Mathieu-Daudé
2022-10-26 19:46 ` [PATCH 3/3] hw/isa/piix4: Correct IRQRC[A:D] reset values Philippe Mathieu-Daudé
2022-10-26 21:32 ` Bernhard Beschow
2022-10-27 20:45 ` Philippe Mathieu-Daudé
2022-10-26 19:48 ` [PATCH 0/3] hw/isa/piix4: Remove MIPS Malta specific bits Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221026194619.28880-2-philmd@linaro.org \
--to=philmd@linaro.org \
--cc=aurelien@aurel32.net \
--cc=hpoussin@reactos.org \
--cc=jiaxun.yang@flygoat.com \
--cc=qemu-devel@nongnu.org \
--cc=shentey@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).