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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Jerome Forissier <jerome.forissier@linaro.org>
Subject: [PATCH 0/2] hw/arm/boot.c: Set EL3 HXen, vector lengths when direct booting kernel
Date: Thu, 27 Oct 2022 15:02:05 +0100	[thread overview]
Message-ID: <20221027140207.413084-1-peter.maydell@linaro.org> (raw)

When we direct boot a kernel on a CPU which emulates EL3, we need to
set up the EL3 system registers as the Linux kernel documentation
specifies:
    https://www.kernel.org/doc/Documentation/arm64/booting.rst

Mostly we get this right, but working through the list of config
bits that need to be set, I found that we'd missed a few things:

- FEAT_HCX: SCR_EL3.HXEn (bit 38) must be initialised to 0b1
- SVE: ZCR_EL3.LEN should be initialized to a sensible value.
  We leave it at 0, which means the guest can only use the
  minimum vector length supported by the CPU, not the full range.
- SME: ditto for SMCR_EL3.LEN

This series fixes those.

thanks
-- PMM

Peter Maydell (2):
  hw/arm/boot: Set SME and SVE EL3 vector lengths when booting kernel
  hw/arm/boot: Set SCR_EL3.HXEn when booting kernel

 hw/arm/boot.c | 5 +++++
 1 file changed, 5 insertions(+)

-- 
2.25.1



             reply	other threads:[~2022-10-27 14:03 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-27 14:02 Peter Maydell [this message]
2022-10-27 14:02 ` [PATCH 1/2] hw/arm/boot: Set SME and SVE EL3 vector lengths when booting kernel Peter Maydell
2022-10-27 20:22   ` Richard Henderson
2022-10-27 14:02 ` [PATCH 2/2] hw/arm/boot: Set SCR_EL3.HXEn " Peter Maydell
2022-10-27 20:23   ` Richard Henderson

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