From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, stefanha@redhat.com,
BALATON Zoltan <balaton@eik.bme.hu>,
Daniel Henrique Barboza <danielhb413@gmail.com>
Subject: [PULL 50/62] ppc4xx_sdram: Move ppc4xx_sdram_banks() to ppc4xx_sdram.c
Date: Fri, 28 Oct 2022 13:39:39 -0300 [thread overview]
Message-ID: <20221028163951.810456-51-danielhb413@gmail.com> (raw)
In-Reply-To: <20221028163951.810456-1-danielhb413@gmail.com>
From: BALATON Zoltan <balaton@eik.bme.hu>
This function is only used by the ppc4xx memory controller models so
it can be made static.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <b1504a82157a586aa284e8ee3b427b9a07b24169.1666194485.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/ppc/ppc4xx_devs.c | 62 -----------------------------------------
hw/ppc/ppc4xx_sdram.c | 61 ++++++++++++++++++++++++++++++++++++++++
include/hw/ppc/ppc4xx.h | 20 ++++++-------
3 files changed, 69 insertions(+), 74 deletions(-)
diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
index f737dbb3d6..c1d111465d 100644
--- a/hw/ppc/ppc4xx_devs.c
+++ b/hw/ppc/ppc4xx_devs.c
@@ -23,73 +23,11 @@
*/
#include "qemu/osdep.h"
-#include "qemu/units.h"
#include "cpu.h"
#include "hw/ppc/ppc4xx.h"
#include "hw/qdev-properties.h"
#include "qapi/error.h"
-/*
- * Split RAM between SDRAM banks.
- *
- * sdram_bank_sizes[] must be in descending order, that is sizes[i] > sizes[i+1]
- * and must be 0-terminated.
- *
- * The 4xx SDRAM controller supports a small number of banks, and each bank
- * must be one of a small set of sizes. The number of banks and the supported
- * sizes varies by SoC.
- */
-void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks,
- Ppc4xxSdramBank ram_banks[],
- const ram_addr_t sdram_bank_sizes[])
-{
- ram_addr_t size_left = memory_region_size(ram);
- ram_addr_t base = 0;
- ram_addr_t bank_size;
- int i;
- int j;
-
- for (i = 0; i < nr_banks; i++) {
- for (j = 0; sdram_bank_sizes[j] != 0; j++) {
- bank_size = sdram_bank_sizes[j];
- if (bank_size <= size_left) {
- char name[32];
-
- ram_banks[i].base = base;
- ram_banks[i].size = bank_size;
- base += bank_size;
- size_left -= bank_size;
- snprintf(name, sizeof(name), "ppc4xx.sdram%d", i);
- memory_region_init_alias(&ram_banks[i].ram, NULL, name, ram,
- ram_banks[i].base, ram_banks[i].size);
- break;
- }
- }
- if (!size_left) {
- /* No need to use the remaining banks. */
- break;
- }
- }
-
- if (size_left) {
- ram_addr_t used_size = memory_region_size(ram) - size_left;
- GString *s = g_string_new(NULL);
-
- for (i = 0; sdram_bank_sizes[i]; i++) {
- g_string_append_printf(s, "%" PRIi64 "%s",
- sdram_bank_sizes[i] / MiB,
- sdram_bank_sizes[i + 1] ? ", " : "");
- }
- error_report("at most %d bank%s of %s MiB each supported",
- nr_banks, nr_banks == 1 ? "" : "s", s->str);
- error_printf("Possible valid RAM size: %" PRIi64 " MiB\n",
- used_size ? used_size / MiB : sdram_bank_sizes[i - 1] / MiB);
-
- g_string_free(s, true);
- exit(EXIT_FAILURE);
- }
-}
-
/*****************************************************************************/
/* MAL */
diff --git a/hw/ppc/ppc4xx_sdram.c b/hw/ppc/ppc4xx_sdram.c
index d88363bc3d..62ef7d8f0d 100644
--- a/hw/ppc/ppc4xx_sdram.c
+++ b/hw/ppc/ppc4xx_sdram.c
@@ -43,6 +43,67 @@
/*****************************************************************************/
/* Shared functions */
+/*
+ * Split RAM between SDRAM banks.
+ *
+ * sdram_bank_sizes[] must be in descending order, that is sizes[i] > sizes[i+1]
+ * and must be 0-terminated.
+ *
+ * The 4xx SDRAM controller supports a small number of banks, and each bank
+ * must be one of a small set of sizes. The number of banks and the supported
+ * sizes varies by SoC.
+ */
+static void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks,
+ Ppc4xxSdramBank ram_banks[],
+ const ram_addr_t sdram_bank_sizes[])
+{
+ ram_addr_t size_left = memory_region_size(ram);
+ ram_addr_t base = 0;
+ ram_addr_t bank_size;
+ int i;
+ int j;
+
+ for (i = 0; i < nr_banks; i++) {
+ for (j = 0; sdram_bank_sizes[j] != 0; j++) {
+ bank_size = sdram_bank_sizes[j];
+ if (bank_size <= size_left) {
+ char name[32];
+
+ ram_banks[i].base = base;
+ ram_banks[i].size = bank_size;
+ base += bank_size;
+ size_left -= bank_size;
+ snprintf(name, sizeof(name), "ppc4xx.sdram%d", i);
+ memory_region_init_alias(&ram_banks[i].ram, NULL, name, ram,
+ ram_banks[i].base, ram_banks[i].size);
+ break;
+ }
+ }
+ if (!size_left) {
+ /* No need to use the remaining banks. */
+ break;
+ }
+ }
+
+ if (size_left) {
+ ram_addr_t used_size = memory_region_size(ram) - size_left;
+ GString *s = g_string_new(NULL);
+
+ for (i = 0; sdram_bank_sizes[i]; i++) {
+ g_string_append_printf(s, "%" PRIi64 "%s",
+ sdram_bank_sizes[i] / MiB,
+ sdram_bank_sizes[i + 1] ? ", " : "");
+ }
+ error_report("at most %d bank%s of %s MiB each supported",
+ nr_banks, nr_banks == 1 ? "" : "s", s->str);
+ error_printf("Possible valid RAM size: %" PRIi64 " MiB\n",
+ used_size ? used_size / MiB : sdram_bank_sizes[i - 1] / MiB);
+
+ g_string_free(s, true);
+ exit(EXIT_FAILURE);
+ }
+}
+
static void sdram_bank_map(Ppc4xxSdramBank *bank)
{
memory_region_init(&bank->container, NULL, "sdram-container", bank->size);
diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
index 10c6dd535f..f8c86e09ec 100644
--- a/include/hw/ppc/ppc4xx.h
+++ b/include/hw/ppc/ppc4xx.h
@@ -29,18 +29,6 @@
#include "exec/memory.h"
#include "hw/sysbus.h"
-typedef struct {
- MemoryRegion ram;
- MemoryRegion container; /* used for clipping */
- hwaddr base;
- hwaddr size;
- uint32_t bcr;
-} Ppc4xxSdramBank;
-
-void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks,
- Ppc4xxSdramBank ram_banks[],
- const ram_addr_t sdram_bank_sizes[]);
-
#define TYPE_PPC4xx_PCI_HOST_BRIDGE "ppc4xx-pcihost"
/*
@@ -111,6 +99,14 @@ struct Ppc4xxEbcState {
};
/* SDRAM DDR controller */
+typedef struct {
+ MemoryRegion ram;
+ MemoryRegion container; /* used for clipping */
+ hwaddr base;
+ hwaddr size;
+ uint32_t bcr;
+} Ppc4xxSdramBank;
+
#define SDR0_DDR0_DDRM_ENCODE(n) ((((unsigned long)(n)) & 0x03) << 29)
#define SDR0_DDR0_DDRM_DDR1 0x20000000
#define SDR0_DDR0_DDRM_DDR2 0x40000000
--
2.37.3
next prev parent reply other threads:[~2022-10-28 16:45 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-28 16:38 [PULL 00/62] ppc queue Daniel Henrique Barboza
2022-10-28 16:38 ` [PULL 01/62] target/ppc: fix msgclr/msgsnd insns flags Daniel Henrique Barboza
2022-10-28 16:38 ` [PULL 02/62] target/ppc: fix msgsync " Daniel Henrique Barboza
2022-10-28 16:38 ` [PULL 03/62] target/ppc: fix REQUIRE_HV macro definition Daniel Henrique Barboza
2022-10-28 16:38 ` [PULL 04/62] target/ppc: move msgclr/msgsnd to decodetree Daniel Henrique Barboza
2022-10-28 16:38 ` [PULL 05/62] target/ppc: move msgclrp/msgsndp " Daniel Henrique Barboza
2022-10-28 16:38 ` [PULL 06/62] target/ppc: move msgsync " Daniel Henrique Barboza
2022-10-28 16:38 ` [PULL 07/62] target/ppc: Moved VMLADDUHM to decodetree and use gvec Daniel Henrique Barboza
2022-10-28 16:38 ` [PULL 08/62] target/ppc: Move VMH[R]ADDSHS instruction to decodetree Daniel Henrique Barboza
2022-10-28 16:38 ` [PULL 09/62] target/ppc: Move V(ADD|SUB)CUW to decodetree and use gvec Daniel Henrique Barboza
2022-10-28 16:38 ` [PULL 10/62] target/ppc: Move VNEG[WD] to decodtree " Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 11/62] target/ppc: Move VPRTYB[WDQ] to decodetree " Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 12/62] target/ppc: Move VAVG[SU][BHW] " Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 13/62] target/ppc: Move VABSDU[BHW] " Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 14/62] target/ppc: Use gvec to decode XV[N]ABS[DS]P/XVNEG[DS]P Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 15/62] target/ppc: Use gvec to decode XVCPSGN[SD]P Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 16/62] target/ppc: Moved XVTSTDC[DS]P to decodetree Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 17/62] target/ppc: Moved XSTSTDC[QDS]P " Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 18/62] target/ppc: Use gvec to decode XVTSTDC[DS]P Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 19/62] target/ppc: define PPC_INTERRUPT_* values directly Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 20/62] target/ppc: always use ppc_set_irq to set env->pending_interrupts Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 21/62] target/ppc: split interrupt masking and delivery from ppc_hw_interrupt Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 22/62] target/ppc: prepare to split interrupt masking and delivery by excp_model Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 23/62] target/ppc: create an interrupt masking method for POWER9/POWER10 Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 24/62] target/ppc: remove unused interrupts from p9_next_unmasked_interrupt Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 25/62] target/ppc: create an interrupt deliver method for POWER9/POWER10 Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 26/62] target/ppc: remove unused interrupts from p9_deliver_interrupt Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 27/62] target/ppc: remove generic architecture checks " Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 28/62] target/ppc: move power-saving interrupt masking out of cpu_has_work_POWER9 Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 29/62] target/ppc: add power-saving interrupt masking logic to p9_next_unmasked_interrupt Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 30/62] target/ppc: create an interrupt masking method for POWER8 Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 31/62] target/ppc: remove unused interrupts from p8_next_unmasked_interrupt Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 32/62] target/ppc: create an interrupt deliver method for POWER8 Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 33/62] target/ppc: remove unused interrupts from p8_deliver_interrupt Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 34/62] target/ppc: remove generic architecture checks " Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 35/62] target/ppc: move power-saving interrupt masking out of cpu_has_work_POWER8 Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 36/62] target/ppc: add power-saving interrupt masking logic to p8_next_unmasked_interrupt Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 37/62] target/ppc: create an interrupt masking method for POWER7 Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 38/62] target/ppc: remove unused interrupts from p7_next_unmasked_interrupt Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 39/62] target/ppc: create an interrupt deliver method for POWER7 Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 40/62] target/ppc: remove unused interrupts from p7_deliver_interrupt Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 41/62] target/ppc: remove generic architecture checks " Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 42/62] target/ppc: move power-saving interrupt masking out of cpu_has_work_POWER7 Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 43/62] target/ppc: add power-saving interrupt masking logic to p7_next_unmasked_interrupt Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 44/62] target/ppc: remove ppc_store_lpcr from CONFIG_USER_ONLY builds Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 45/62] target/ppc: introduce ppc_maybe_interrupt Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 46/62] target/ppc: unify cpu->has_work based on cs->interrupt_request Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 47/62] target/ppc: move the p*_interrupt_powersave methods to excp_helper.c Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 48/62] ppc440_uc.c: Move DDR2 SDRAM controller model to ppc4xx_sdram.c Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 49/62] ppc4xx_devs.c: Move DDR " Daniel Henrique Barboza
2022-10-28 16:39 ` Daniel Henrique Barboza [this message]
2022-10-28 16:39 ` [PULL 51/62] ppc4xx_sdram: Use hwaddr for memory bank size Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 52/62] ppc4xx_sdram: Rename local state variable for brevity Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 53/62] ppc4xx_sdram: Generalise bank setup Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 54/62] ppc4xx_sdram: Convert DDR SDRAM controller to new bank handling Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 55/62] ppc4xx_sdram: Add errp parameter to ppc4xx_sdram_banks() Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 56/62] target/ppc: Add new PMC HFLAGS Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 57/62] target/ppc: Increment PMC5 with inline insns Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 58/62] docs/system/ppc/ppce500: Use qemu-system-ppc64 across the board(s) Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 59/62] hw/block/pflash_cfi0{1, 2}: Error out if device length isn't a power of two Daniel Henrique Barboza
2022-11-01 22:23 ` Stefan Hajnoczi
2022-11-01 22:49 ` Philippe Mathieu-Daudé
2022-11-02 19:49 ` Daniel Henrique Barboza
2022-11-08 17:36 ` Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 60/62] hw/sd/sdhci-internal: Unexport ESDHC defines Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 61/62] hw/sd/sdhci: Rename ESDHC_* defines to USDHC_* Daniel Henrique Barboza
2022-10-28 16:39 ` [PULL 62/62] hw/ppc/e500: Implement pflash handling Daniel Henrique Barboza
2022-10-28 20:25 ` [PULL 00/62] ppc queue Daniel Henrique Barboza
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