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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Claudio Fontana <cfontana@suse.de>
Subject: [PULL 06/11] target/i386: Use cpu_unwind_state_data for tpr access
Date: Mon, 31 Oct 2022 16:39:43 +1100	[thread overview]
Message-ID: <20221031053948.3408-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20221031053948.3408-1-richard.henderson@linaro.org>

Avoid cpu_restore_state, and modifying env->eip out from
underneath the translator with TARGET_TB_PCREL.  There is
some slight duplication from x86_restore_state_to_opc,
but it's just a few lines.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1269
Reviewed-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/i386/helper.c | 21 +++++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/target/i386/helper.c b/target/i386/helper.c
index b62a1e48e2..2cd1756f1a 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -509,6 +509,23 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
     }
 }
 
+static target_ulong get_memio_eip(CPUX86State *env)
+{
+    uint64_t data[TARGET_INSN_START_WORDS];
+    CPUState *cs = env_cpu(env);
+
+    if (!cpu_unwind_state_data(cs, cs->mem_io_pc, data)) {
+        return env->eip;
+    }
+
+    /* Per x86_restore_state_to_opc. */
+    if (TARGET_TB_PCREL) {
+        return (env->eip & TARGET_PAGE_MASK) | data[0];
+    } else {
+        return data[0] - env->segs[R_CS].base;
+    }
+}
+
 void cpu_report_tpr_access(CPUX86State *env, TPRAccess access)
 {
     X86CPU *cpu = env_archcpu(env);
@@ -519,9 +536,9 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access)
 
         cpu_interrupt(cs, CPU_INTERRUPT_TPR);
     } else if (tcg_enabled()) {
-        cpu_restore_state(cs, cs->mem_io_pc, false);
+        target_ulong eip = get_memio_eip(env);
 
-        apic_handle_tpr_access_report(cpu->apic_state, env->eip, access);
+        apic_handle_tpr_access_report(cpu->apic_state, eip, access);
     }
 }
 #endif /* !CONFIG_USER_ONLY */
-- 
2.34.1



  parent reply	other threads:[~2022-10-31  5:40 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-31  5:39 [PULL 00/11] tcg patch queue Richard Henderson
2022-10-31  5:39 ` [PULL 01/11] tcg/sparc: Remove support for sparc32plus Richard Henderson
2022-10-31  5:39 ` [PULL 02/11] tcg/sparc64: Rename from tcg/sparc Richard Henderson
2022-10-31  5:39 ` [PULL 03/11] tcg/sparc64: Remove sparc32plus constraints Richard Henderson
2022-10-31  5:39 ` [PULL 04/11] tcg/tci: fix logic error when registering helpers via FFI Richard Henderson
2022-10-31  5:39 ` [PULL 05/11] accel/tcg: Introduce cpu_unwind_state_data Richard Henderson
2022-10-31  5:39 ` Richard Henderson [this message]
2022-10-31  5:39 ` [PULL 07/11] target/openrisc: Always exit after mtspr npc Richard Henderson
2022-10-31  5:39 ` [PULL 08/11] target/openrisc: Use cpu_unwind_state_data for mfspr Richard Henderson
2022-10-31  5:39 ` [PULL 09/11] accel/tcg: Remove will_exit argument from cpu_restore_state Richard Henderson
2022-10-31  5:39 ` [PULL 10/11] accel/tcg: Remove reset_icount argument from cpu_restore_state_from_tb Richard Henderson
2022-10-31  5:39 ` [PULL 11/11] target/i386: Expand eflags updates inline Richard Henderson
2022-10-31 17:09 ` [PULL 00/11] tcg patch queue Stefan Hajnoczi

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