From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Bin Meng" <bin.meng@windriver.com>,
"Hanna Reitz" <hreitz@redhat.com>,
"David Hildenbrand" <david@redhat.com>,
"Kevin Wolf" <kwolf@redhat.com>,
qemu-block@nongnu.org, "Peter Xu" <peterx@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Daniel Henrique Barboza" <danielhb413@gmail.com>
Subject: [PULL 3/3] Revert "hw/block/pflash_cfi: Error out if dev length isn't power of 2"
Date: Tue, 8 Nov 2022 19:33:52 +0100 [thread overview]
Message-ID: <20221108183352.9466-4-philmd@linaro.org> (raw)
In-Reply-To: <20221108183352.9466-1-philmd@linaro.org>
From: Daniel Henrique Barboza <danielhb413@gmail.com>
Commit 334c388f25 ("pflash_cfi: Error out if device length
isn't a power of two") aimed to finish the effort started by
commit 06f1521795 ("pflash: Require backend size to match device,
improve errors"), but unfortunately we are not quite there since
various machines are still ready to accept incomplete / oversized
pflash backend images, and now fail, i.e. on Debian bullseye:
$ qemu-system-x86_64 \
-drive \
if=pflash,format=raw,unit=0,readonly=on,file=/usr/share/OVMF/OVMF_CODE.fd
qemu-system-x86_64: Device size must be a power of two.
where OVMF_CODE.fd comes from the ovmf package, which doesn't
pad the firmware images to the flash size:
$ ls -lh /usr/share/OVMF/
-rw-r--r-- 1 root root 3.5M Aug 19 2021 OVMF_CODE_4M.fd
-rw-r--r-- 1 root root 1.9M Aug 19 2021 OVMF_CODE.fd
-rw-r--r-- 1 root root 128K Aug 19 2021 OVMF_VARS.fd
Since we entered the freeze period to prepare the v7.2.0 release,
the safest is to revert commit 334c388f25707a234c4a0dea05b9df08d.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1294
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221108175755.95141-1-philmd@linaro.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20221108172633.860700-1-danielhb413@gmail.com>
---
hw/block/pflash_cfi01.c | 8 ++------
hw/block/pflash_cfi02.c | 5 -----
2 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 9c235bf66e..0cbc2fb4cb 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -690,7 +690,7 @@ static const MemoryRegionOps pflash_cfi01_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static void pflash_cfi01_fill_cfi_table(PFlashCFI01 *pfl, Error **errp)
+static void pflash_cfi01_fill_cfi_table(PFlashCFI01 *pfl)
{
uint64_t blocks_per_device, sector_len_per_device, device_len;
int num_devices;
@@ -708,10 +708,6 @@ static void pflash_cfi01_fill_cfi_table(PFlashCFI01 *pfl, Error **errp)
sector_len_per_device = pfl->sector_len / num_devices;
}
device_len = sector_len_per_device * blocks_per_device;
- if (!is_power_of_2(device_len)) {
- error_setg(errp, "Device size must be a power of two.");
- return;
- }
/* Hardcoded CFI table */
/* Standard "QRY" string */
@@ -869,7 +865,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
*/
pfl->cmd = 0x00;
pfl->status = 0x80; /* WSM ready */
- pflash_cfi01_fill_cfi_table(pfl, errp);
+ pflash_cfi01_fill_cfi_table(pfl);
}
static void pflash_cfi01_system_reset(DeviceState *dev)
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index ff2fe154c1..2a99b286b0 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -880,11 +880,6 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
return;
}
- if (!is_power_of_2(pfl->chip_len)) {
- error_setg(errp, "Device size must be a power of two.");
- return;
- }
-
memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl),
&pflash_cfi02_ops, pfl, pfl->name,
pfl->chip_len, errp);
--
2.38.1
next prev parent reply other threads:[~2022-11-08 18:35 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-08 18:33 [PULL 0/3] Memory/SDHCI/ParallelFlash patches for v7.2.0-rc0 Philippe Mathieu-Daudé
2022-11-08 18:33 ` [PULL 1/3] memory: Fix wrong end address dump Philippe Mathieu-Daudé
2022-11-08 18:33 ` [PULL 2/3] hw/sd/sdhci: Do not set Buf Wr Ena before writing block (CVE-2022-3872) Philippe Mathieu-Daudé
2022-11-08 18:33 ` Philippe Mathieu-Daudé [this message]
2022-11-08 20:49 ` [PULL 0/3] Memory/SDHCI/ParallelFlash patches for v7.2.0-rc0 Stefan Hajnoczi
2022-11-08 20:57 ` Stefan Hajnoczi
2022-11-09 7:43 ` Philippe Mathieu-Daudé
2023-12-21 21:19 ` Salvatore Bonaccorso
2025-06-24 4:43 ` Philippe Mathieu-Daudé
2025-07-01 15:48 ` T K Sourabh
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