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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id p15-20020adfce0f000000b0022cbf4cda62sm16209186wrn.27.2022.11.09.08.14.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 08:14:45 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.0 0/9] arm: Convert Arm GIC, ITS, SMMU devices to 3-phase reset Date: Wed, 9 Nov 2022 16:14:35 +0000 Message-Id: <20221109161444.3397405-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This patchset converts some Arm devices to 3-phase reset. The rationale here is that it would be nice to get rid of the device_class_set_parent_reset() function, which is used by legacy-reset subclasses which want to chain to their parent's reset function. There aren't very many of these devices in total, and if we convert them and their parent classes to 3-phase reset they can use the 3-phase-reset equivalent function resettable_class_set_parent_phases(). Eventually this will then let us simplify the transitional code for handling old-style device reset. Note that it's necessary to convert the parent class before the subclass -- the resettable transitional logic will handle the situation where the subclass is still using legacy reset and chaining to what it thinks is the parent's legacy reset function (by doing a 3-phase reset on the parent), but if the subclass is 3-phase then the parent must be too. I plan to do the other uses of device_class_set_parent_reset() too, but since the conversion patchsets don't depend on each other I'm going to send them out piecemeal so they can be cc'd to the relevant maintainers, rather than having a single massive patchset with a billion people on cc. thanks -- PMM Peter Maydell (9): hw/arm: Convert TYPE_ARM_SMMU to 3-phase reset hw/arm: Convert TYPE_ARM_SMMUV3 to 3-phase reset hw/intc: Convert TYPE_ARM_GIC_COMMON to 3-phase reset hw/intc: Convert TYPE_ARM_GIC_KVM to 3-phase reset hw/intc: Convert TYPE_ARM_GICV3_COMMON to 3-phase reset hw/intc: Convert TYPE_KVM_ARM_GICV3 to 3-phase reset hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON to 3-phase reset hw/intc: Convert TYPE_ARM_GICV3_ITS to 3-phase reset hw/intc: Convert TYPE_KVM_ARM_ITS to 3-phase reset include/hw/arm/smmuv3.h | 2 +- hw/arm/smmu-common.c | 7 ++++--- hw/arm/smmuv3.c | 12 ++++++++---- hw/intc/arm_gic_common.c | 7 ++++--- hw/intc/arm_gic_kvm.c | 14 +++++++++----- hw/intc/arm_gicv3_common.c | 7 ++++--- hw/intc/arm_gicv3_its.c | 14 +++++++++----- hw/intc/arm_gicv3_its_common.c | 7 ++++--- hw/intc/arm_gicv3_its_kvm.c | 14 +++++++++----- hw/intc/arm_gicv3_kvm.c | 14 +++++++++----- 10 files changed, 61 insertions(+), 37 deletions(-) -- 2.25.1