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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id l10-20020adff48a000000b002366ded5864sm14353585wro.116.2022.11.22.08.39.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Nov 2022 08:39:55 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 0/2] target-arm queue Date: Tue, 22 Nov 2022 16:39:52 +0000 Message-Id: <20221122163954.1900093-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi; this pull request has a couple of fixes for bugs in the Arm page-table-walk code, which arrived in the last day or so. I'm sending this out now in the hope it might just sneak in before rc2 gets tagged, so the fixes can get more testing time before the 7.2 release; but if they don't make it then this should go into rc3. thanks -- PMM The following changes since commit 6d71357a3b651ec9db126e4862b77e13165427f5: rtl8139: honor large send MSS value (2022-11-21 09:28:43 -0500) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20221122 for you to fetch changes up to 15f8f4671afd22491ce99d28a296514717fead4f: target/arm: Use signed quantity to represent VMSAv8-64 translation level (2022-11-22 16:10:25 +0000) ---------------------------------------------------------------- target-arm: * Fix broken 5-level pagetable handling * Fix debug accesses when EL2 is present ---------------------------------------------------------------- Ard Biesheuvel (1): target/arm: Use signed quantity to represent VMSAv8-64 translation level Peter Maydell (1): target/arm: Don't do two-stage lookup if stage 2 is disabled target/arm/ptw.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-)