From: Ilya Leoshkevich <iii@linux.ibm.com>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org
Subject: Re: [PATCH 24/26] tcg: Introduce tcg_temp_ebb_new_*
Date: Wed, 30 Nov 2022 19:07:03 +0100 [thread overview]
Message-ID: <20221130180703.dprt7lzmppgfihtp@heavy> (raw)
In-Reply-To: <20221006034421.1179141-25-richard.henderson@linaro.org>
On Wed, Oct 05, 2022 at 08:44:19PM -0700, Richard Henderson wrote:
> Allow targets to allocate extended-basic-block temps.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/tcg/tcg-op.h | 2 ++
> include/tcg/tcg.h | 20 +++++++++++++++++++-
> tcg/tcg.c | 16 ++++------------
> 3 files changed, 25 insertions(+), 13 deletions(-)
>
> diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
> index 209e168305..0ebbee6e24 100644
> --- a/include/tcg/tcg-op.h
> +++ b/include/tcg/tcg-op.h
> @@ -848,6 +848,7 @@ static inline void tcg_gen_plugin_cb_end(void)
> #define tcg_temp_new() tcg_temp_new_i32()
> #define tcg_global_mem_new tcg_global_mem_new_i32
> #define tcg_temp_local_new() tcg_temp_local_new_i32()
> +#define tcg_temp_ebb_new() tcg_temp_ebb_new_i32()
> #define tcg_temp_free tcg_temp_free_i32
> #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
> #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
> @@ -855,6 +856,7 @@ static inline void tcg_gen_plugin_cb_end(void)
> #define tcg_temp_new() tcg_temp_new_i64()
> #define tcg_global_mem_new tcg_global_mem_new_i64
> #define tcg_temp_local_new() tcg_temp_local_new_i64()
> +#define tcg_temp_ebb_new() tcg_temp_ebb_new_i64()
> #define tcg_temp_free tcg_temp_free_i64
> #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
> #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
> diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
> index e01a47ec20..3835711d52 100644
> --- a/include/tcg/tcg.h
> +++ b/include/tcg/tcg.h
> @@ -609,7 +609,7 @@ struct TCGContext {
> #endif
>
> GHashTable *const_table[TCG_TYPE_COUNT];
> - TCGTempSet free_temps[TCG_TYPE_COUNT * 2];
> + TCGTempSet free_temps[TCG_TYPE_COUNT * 3];
> TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
>
> QTAILQ_HEAD(, TCGOp) ops, free_ops;
> @@ -890,6 +890,12 @@ static inline TCGv_i32 tcg_temp_local_new_i32(void)
> return temp_tcgv_i32(t);
> }
>
> +static inline TCGv_i32 tcg_temp_ebb_new_i32(void)
> +{
> + TCGTemp *t = tcg_temp_new_internal(TCG_TYPE_I32, TEMP_EBB);
> + return temp_tcgv_i32(t);
> +}
> +
> static inline TCGv_i64 tcg_global_mem_new_i64(TCGv_ptr reg, intptr_t offset,
> const char *name)
> {
> @@ -909,6 +915,12 @@ static inline TCGv_i64 tcg_temp_local_new_i64(void)
> return temp_tcgv_i64(t);
> }
>
> +static inline TCGv_i64 tcg_temp_ebb_new_i64(void)
> +{
> + TCGTemp *t = tcg_temp_new_internal(TCG_TYPE_I64, TEMP_EBB);
> + return temp_tcgv_i64(t);
> +}
> +
> static inline TCGv_ptr tcg_global_mem_new_ptr(TCGv_ptr reg, intptr_t offset,
> const char *name)
> {
> @@ -928,6 +940,12 @@ static inline TCGv_ptr tcg_temp_local_new_ptr(void)
> return temp_tcgv_ptr(t);
> }
>
> +static inline TCGv_ptr tcg_temp_ebb_new_ptr(void)
> +{
> + TCGTemp *t = tcg_temp_new_internal(TCG_TYPE_PTR, TEMP_EBB);
> + return temp_tcgv_ptr(t);
> +}
> +
> #if defined(CONFIG_DEBUG_TCG)
> /* If you call tcg_clear_temp_count() at the start of a section of
> * code which is not supposed to leak any TCG temporaries, then
> diff --git a/tcg/tcg.c b/tcg/tcg.c
> index acdbd5a9a2..7aa6cc3451 100644
> --- a/tcg/tcg.c
> +++ b/tcg/tcg.c
> @@ -948,17 +948,8 @@ TCGTemp *tcg_temp_new_internal(TCGType type, TCGTempKind kind)
> TCGTemp *ts;
> int idx, k;
>
> - switch (kind) {
> - case TEMP_NORMAL:
> - k = 0;
> - break;
> - case TEMP_LOCAL:
> - k = TCG_TYPE_COUNT;
> - break;
> - default:
> - g_assert_not_reached();
> - }
> - k += type;
> + assert(kind >= TEMP_NORMAL && kind <= TEMP_LOCAL);
Nit: maybe also add QEMU_BUILD_BUG_ON(TEMP_NORMAL != 0)
and QEMU_BUILD_BUG_ON(TEMP_LOCAL != 2), since we are using this for
0-based array indexing here? Alternatively, subtract TEMP_NORMAL
from kind.
> + k = TCG_TYPE_COUNT * kind + type;
>
> idx = find_first_bit(s->free_temps[k].l, TCG_MAX_TEMPS);
> if (idx < TCG_MAX_TEMPS) {
> @@ -1046,6 +1037,7 @@ void tcg_temp_free_internal(TCGTemp *ts)
> */
> return;
> case TEMP_NORMAL:
> + case TEMP_EBB:
> case TEMP_LOCAL:
> break;
> default:
> @@ -1063,7 +1055,7 @@ void tcg_temp_free_internal(TCGTemp *ts)
> ts->temp_allocated = 0;
>
> idx = temp_idx(ts);
> - k = ts->base_type + (ts->kind == TEMP_NORMAL ? 0 : TCG_TYPE_COUNT);
> + k = ts->base_type + ts->kind * TCG_TYPE_COUNT;
> set_bit(idx, s->free_temps[k].l);
> }
>
> --
> 2.34.1
>
>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
While not directly related to this patch, it would be good to update
tcg/README with all the new kinds of temporaries. E.g. the EBB ones are
not mentioned there:
TCG instructions operate on variables which are temporaries, local
temporaries or globals.
next prev parent reply other threads:[~2022-11-30 18:08 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-06 3:43 [PATCH 00/26] target/s390x: pc-relative translation blocks Richard Henderson
2022-10-06 3:43 ` [PATCH 01/26] target/s390x: Use tcg_constant_* in local contexts Richard Henderson
2022-11-03 10:38 ` Ilya Leoshkevich
2022-10-06 3:43 ` [PATCH 02/26] target/s390x: Use tcg_constant_* for DisasCompare Richard Henderson
2022-11-03 10:54 ` Ilya Leoshkevich
2022-10-06 3:43 ` [PATCH 03/26] target/s390x: Use tcg_constant_i32 for fpinst_extract_m34 Richard Henderson
2022-11-03 10:56 ` Ilya Leoshkevich
2022-10-06 3:43 ` [PATCH 04/26] target/s390x: Use tcg_constant_* in translate_vx.c.inc Richard Henderson
2022-11-03 11:04 ` Ilya Leoshkevich
2022-11-03 23:05 ` Richard Henderson
2022-10-06 3:44 ` [PATCH 05/26] target/s390x: Change help_goto_direct to work on displacements Richard Henderson
2022-11-03 11:13 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 06/26] target/s390x: Introduce gen_psw_addr_disp Richard Henderson
2022-11-03 11:22 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 07/26] target/s390x: Remove pc argument to pc_to_link_into Richard Henderson
2022-11-03 11:23 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 08/26] target/s390x: Use gen_psw_addr_disp in pc_to_link_info Richard Henderson
2022-11-03 11:26 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 09/26] target/s390x: Use gen_psw_addr_disp in save_link_info Richard Henderson
2022-11-03 12:52 ` Ilya Leoshkevich
2022-11-03 13:00 ` [PATCH] tests/tcg/s390x: Add bal.S Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 10/26] target/s390x: Use gen_psw_addr_disp in op_sam Richard Henderson
2022-11-03 13:11 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 11/26] target/s390x: Use ilen instead in branches Richard Henderson
2022-11-03 13:13 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 12/26] target/s390x: Move masking of psw.addr to cpu_get_tb_cpu_state Richard Henderson
2022-11-03 13:42 ` Ilya Leoshkevich
2022-11-04 22:27 ` Richard Henderson
2022-11-29 1:49 ` Ilya Leoshkevich
2022-11-29 1:53 ` [PATCH] tests/tcg/s390x: Add sam.S Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 13/26] target/s390x: Add disp argument to update_psw_addr Richard Henderson
2022-11-03 13:44 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 14/26] target/s390x: Don't set gbea for user-only Richard Henderson
2022-11-03 13:46 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 15/26] target/s390x: Introduce per_enabled Richard Henderson
2022-11-03 13:47 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 16/26] target/s390x: Disable conditional branch-to-next for PER Richard Henderson
2022-11-03 14:32 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 17/26] target/s390x: Introduce help_goto_indirect Richard Henderson
2022-11-30 10:15 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 18/26] target/s390x: Split per_branch Richard Henderson
2022-11-03 14:45 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 19/26] target/s390x: Simplify help_branch Richard Henderson
2022-11-30 12:06 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 20/26] target/s390x: Split per_breaking_event from per_branch_* Richard Henderson
2022-11-30 12:14 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 21/26] target/s390x: Remove PER check from use_goto_tb Richard Henderson
2022-11-30 17:33 ` Ilya Leoshkevich
2022-11-30 17:46 ` [PATCH 1/2] target/s390x: Fix successful-branch PER events Ilya Leoshkevich
2022-11-30 17:46 ` [PATCH 2/2] tests/tcg/s390x: Add per.S Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 22/26] target/s390x: Pass original r2 register to BCR Richard Henderson
2022-11-30 17:53 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 23/26] tcg: Pass TCGTempKind to tcg_temp_new_internal Richard Henderson
2022-11-30 17:56 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 24/26] tcg: Introduce tcg_temp_ebb_new_* Richard Henderson
2022-11-30 18:07 ` Ilya Leoshkevich [this message]
2022-11-30 21:09 ` Richard Henderson
2022-12-01 19:13 ` Alex Bennée
2022-12-01 20:34 ` Richard Henderson
2022-10-06 3:44 ` [PATCH 25/26] tcg: Introduce tcg_temp_is_normal_* Richard Henderson
2022-11-30 18:07 ` Ilya Leoshkevich
2022-10-06 3:44 ` [PATCH 26/26] target/s390x: Enable TARGET_TB_PCREL Richard Henderson
2022-10-24 23:04 ` [PATCH 00/26] target/s390x: pc-relative translation blocks Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221130180703.dprt7lzmppgfihtp@heavy \
--to=iii@linux.ibm.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-s390x@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).