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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v3 13/34] tcg: Move TCG_{LOW,HIGH} to tcg-internal.h
Date: Thu,  1 Dec 2022 21:39:37 -0800	[thread overview]
Message-ID: <20221202053958.223890-14-richard.henderson@linaro.org> (raw)
In-Reply-To: <20221202053958.223890-1-richard.henderson@linaro.org>

Move the error-generating fallback from tcg-op.c, and
replace "_link_error" with modern QEMU_ERROR markup.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/tcg/tcg-op.h | 33 +++++----------------------------
 include/tcg/tcg.h    | 12 ------------
 tcg/tcg-internal.h   | 14 ++++++++++++++
 tcg/tcg-op-vec.c     |  2 ++
 tcg/tcg-op.c         | 37 ++++++++++++++++++++++++++++---------
 5 files changed, 49 insertions(+), 49 deletions(-)

diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
index 209e168305..8176f194cb 100644
--- a/include/tcg/tcg-op.h
+++ b/include/tcg/tcg-op.h
@@ -667,35 +667,12 @@ static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
     tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
 }
 #else /* TCG_TARGET_REG_BITS == 32 */
-static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
-                                   tcg_target_long offset)
-{
-    tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
-}
+void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
+void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
+void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
 
-static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
-                                    tcg_target_long offset)
-{
-    tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
-}
-
-static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
-                                    tcg_target_long offset)
-{
-    tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
-}
-
-static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
-{
-    tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
-                     TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
-}
-
-static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
-{
-    tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
-                     TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
-}
+void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
+void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 
 void tcg_gen_discard_i64(TCGv_i64 arg);
 void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 5c2254ce9f..d207bc47be 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -737,18 +737,6 @@ static inline TCGv_vec temp_tcgv_vec(TCGTemp *t)
     return (TCGv_vec)temp_tcgv_i32(t);
 }
 
-#if TCG_TARGET_REG_BITS == 32
-static inline TCGv_i32 TCGV_LOW(TCGv_i64 t)
-{
-    return temp_tcgv_i32(tcgv_i64_temp(t));
-}
-
-static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t)
-{
-    return temp_tcgv_i32(tcgv_i64_temp(t) + 1);
-}
-#endif
-
 static inline TCGArg tcg_get_insn_param(TCGOp *op, int arg)
 {
     return op->args[arg];
diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h
index cc82088d52..a9ea27f67a 100644
--- a/tcg/tcg-internal.h
+++ b/tcg/tcg-internal.h
@@ -59,4 +59,18 @@ static inline unsigned tcg_call_flags(TCGOp *op)
     return tcg_call_info(op)->flags;
 }
 
+#if TCG_TARGET_REG_BITS == 32
+static inline TCGv_i32 TCGV_LOW(TCGv_i64 t)
+{
+    return temp_tcgv_i32(tcgv_i64_temp(t));
+}
+static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t)
+{
+    return temp_tcgv_i32(tcgv_i64_temp(t) + 1);
+}
+#else
+extern TCGv_i32 TCGV_LOW(TCGv_i64) QEMU_ERROR("32-bit code path is reachable");
+extern TCGv_i32 TCGV_HIGH(TCGv_i64) QEMU_ERROR("32-bit code path is reachable");
+#endif
+
 #endif /* TCG_INTERNAL_H */
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index 463dabf515..5bf100ea7d 100644
--- a/tcg/tcg-op-vec.c
+++ b/tcg/tcg-op-vec.c
@@ -21,6 +21,8 @@
 #include "tcg/tcg.h"
 #include "tcg/tcg-op.h"
 #include "tcg/tcg-mo.h"
+#include "tcg-internal.h"
+
 
 /* Reduce the number of ifdefs below.  This assumes that all uses of
    TCGV_HIGH and TCGV_LOW are properly protected by a conditional that
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 019fab00cc..6168327030 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -28,16 +28,8 @@
 #include "tcg/tcg-op.h"
 #include "tcg/tcg-mo.h"
 #include "exec/plugin-gen.h"
+#include "tcg-internal.h"
 
-/* Reduce the number of ifdefs below.  This assumes that all uses of
-   TCGV_HIGH and TCGV_LOW are properly protected by a conditional that
-   the compiler can eliminate.  */
-#if TCG_TARGET_REG_BITS == 64
-extern TCGv_i32 TCGV_LOW_link_error(TCGv_i64);
-extern TCGv_i32 TCGV_HIGH_link_error(TCGv_i64);
-#define TCGV_LOW  TCGV_LOW_link_error
-#define TCGV_HIGH TCGV_HIGH_link_error
-#endif
 
 void tcg_gen_op1(TCGOpcode opc, TCGArg a1)
 {
@@ -1171,6 +1163,21 @@ void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
 #endif
 }
 
+void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
+{
+    tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
+}
+
+void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
+{
+    tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
+}
+
+void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
+{
+    tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
+}
+
 void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
 {
 #if HOST_BIG_ENDIAN
@@ -1182,6 +1189,18 @@ void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
 #endif
 }
 
+void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
+{
+    tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
+                     TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
+}
+
+void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
+{
+    tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
+                     TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
+}
+
 void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 {
     tcg_gen_and_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
-- 
2.34.1



  parent reply	other threads:[~2022-12-02  5:53 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-02  5:39 [PATCH for-8.0 v3 00/34] tcg misc patches Richard Henderson
2022-12-02  5:39 ` [PATCH v3 01/34] tcg: convert tcg/README to rst Richard Henderson
2022-12-02  5:39 ` [PATCH v3 02/34] meson: Move CONFIG_TCG_INTERPRETER to config_host Richard Henderson
2022-12-02  9:42   ` Paolo Bonzini
2022-12-02  5:39 ` [PATCH v3 03/34] tcg/s390x: Fix coding style Richard Henderson
2022-12-02  5:39 ` [PATCH v3 04/34] tcg: Cleanup trailing whitespace Richard Henderson
2022-12-02  7:33   ` Philippe Mathieu-Daudé
2022-12-02  5:39 ` [PATCH v3 05/34] tcg: Fix tcg_reg_alloc_dup* Richard Henderson
2022-12-02  5:39 ` [PATCH v3 06/34] tcg: Centralize updates to reg_to_temp Richard Henderson
2022-12-02  5:39 ` [PATCH v3 07/34] tcg: Remove check_regs Richard Henderson
2022-12-02  5:39 ` [PATCH v3 08/34] tcg: Tidy tcg_reg_alloc_op Richard Henderson
2022-12-02  5:39 ` [PATCH v3 09/34] tcg: Introduce paired register allocation Richard Henderson
2022-12-02  5:39 ` [PATCH v3 10/34] tcg: Remove TCG_TARGET_STACK_GROWSUP Richard Henderson
2022-12-02  5:39 ` [PATCH v3 11/34] accel/tcg: Set cflags_next_tb in cpu_common_initfn Richard Henderson
2022-12-02  5:39 ` [PATCH v3 12/34] target/sparc: Avoid TCGV_{LOW,HIGH} Richard Henderson
2022-12-02  5:39 ` Richard Henderson [this message]
2022-12-02  5:39 ` [PATCH v3 14/34] tcg: Add temp_subindex to TCGTemp Richard Henderson
2022-12-02  5:39 ` [PATCH v3 15/34] tcg: Simplify calls to temp_sync vs mem_coherent Richard Henderson
2022-12-02  5:39 ` [PATCH v3 16/34] tcg: Allocate TCGTemp pairs in host memory order Richard Henderson
2022-12-02  5:39 ` [PATCH v3 17/34] tcg: Move TCG_TYPE_COUNT outside enum Richard Henderson
2022-12-02  5:39 ` [PATCH v3 18/34] tcg: Introduce tcg_type_size Richard Henderson
2022-12-02  5:39 ` [PATCH v3 19/34] tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind Richard Henderson
2022-12-02  5:39 ` [PATCH v3 20/34] tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64 Richard Henderson
2022-12-02  5:39 ` [PATCH v3 21/34] tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32 Richard Henderson
2022-12-02  5:39 ` [PATCH v3 22/34] tcg: Use TCG_CALL_ARG_EVEN for TCI special case Richard Henderson
2022-12-02  5:39 ` [PATCH v3 23/34] accel/tcg/plugin: Don't search for the function pointer index Richard Henderson
2022-12-02  5:39 ` [PATCH v3 24/34] accel/tcg/plugin: Avoid duplicate copy in copy_call Richard Henderson
2022-12-02  5:39 ` [PATCH v3 25/34] accel/tcg/plugin: Use copy_op in append_{udata, mem}_cb Richard Henderson
2022-12-02  5:39 ` [PATCH v3 26/34] tci: MAX_OPC_PARAM_IARGS is no longer used Richard Henderson
2022-12-02  5:39 ` [PATCH v3 27/34] tcg: Vary the allocation size for TCGOp Richard Henderson
2022-12-02  5:39 ` [PATCH v3 28/34] tcg: Use output_pref wrapper function Richard Henderson
2022-12-02  5:39 ` [PATCH v3 29/34] tcg: Reorg function calls Richard Henderson
2022-12-06 15:28   ` Ilya Leoshkevich
2022-12-06 15:49     ` Richard Henderson
2022-12-06 15:58       ` Ilya Leoshkevich
2022-12-02  5:39 ` [PATCH v3 30/34] tcg: Convert typecode_to_ffi from array to function Richard Henderson
2022-12-02  5:39 ` [PATCH v3 31/34] tcg: Factor init_ffi_layouts() out of tcg_context_init() Richard Henderson
2022-12-02  5:39 ` [PATCH v3 32/34] tcg: Move ffi_cif pointer into TCGHelperInfo Richard Henderson
2022-12-02  5:39 ` [PATCH v3 33/34] tcg/aarch64: Merge tcg_out_callr into tcg_out_call Richard Henderson
2022-12-02  5:39 ` [PATCH v3 34/34] tcg: Add TCGHelperInfo argument to tcg_out_call Richard Henderson

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