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From: <tobias.roehmel@rwth-aachen.de>
To: <qemu-devel@nongnu.org>
Cc: peter.maydell@linaro.org,
	"Tobias Röhmel" <tobias.roehmel@rwth-aachen.de>
Subject: [PATCH v6 0/7] Add ARM Cortex-R52 CPU
Date: Tue, 6 Dec 2022 11:24:57 +0100	[thread overview]
Message-ID: <20221206102504.165775-1-tobias.roehmel@rwth-aachen.de> (raw)

From: Tobias Röhmel <tobias.roehmel@rwth-aachen.de>

Sorry for the "Reviewed-by" messup. I missed that on the explanation
page. Thanks again for the review :)

v6:
patch 5:
- I also changed HPRENR from ARM_CP_ALIAS to ARM_CP_NO_RAW.
  Its state is also present in the HPRLAR registers,
  but it doesn't make sense to access it raw. (I think)
- I'm freeing the PRBAR/... strings explicitly now since
  I don't know how to use autofree in this setup correctly.
  Maybe {} around the part were the string is created/used,
  such that it is dropped at }?



Tobias Röhmel (7):
  target/arm: Don't add all MIDR aliases for cores that implement PMSA
  target/arm: Make RVBAR available for all ARMv8 CPUs
  target/arm: Make stage_2_format for cache attributes optional
  target/arm: Enable TTBCR_EAE for ARMv8-R AArch32
  target/arm: Add PMSAv8r registers
  target/arm: Add PMSAv8r functionality
  target/arm: Add ARM Cortex-R52 CPU

 target/arm/cpu.c          |  34 +++-
 target/arm/cpu.h          |   6 +
 target/arm/cpu_tcg.c      |  42 +++++
 target/arm/debug_helper.c |   3 +
 target/arm/helper.c       | 336 ++++++++++++++++++++++++++++++++++++--
 target/arm/internals.h    |   4 +
 target/arm/machine.c      |  28 ++++
 target/arm/ptw.c          | 136 ++++++++++++---
 target/arm/tlb_helper.c   |   4 +
 9 files changed, 553 insertions(+), 40 deletions(-)

-- 
2.34.1



             reply	other threads:[~2022-12-06 10:26 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-06 10:24 tobias.roehmel [this message]
2022-12-06 10:24 ` [PATCH v6 1/7] target/arm: Don't add all MIDR aliases for cores that implement PMSA tobias.roehmel
2022-12-06 10:24 ` [PATCH v6 2/7] target/arm: Make RVBAR available for all ARMv8 CPUs tobias.roehmel
2022-12-06 10:25 ` [PATCH v6 3/7] target/arm: Make stage_2_format for cache attributes optional tobias.roehmel
2022-12-06 10:25 ` [PATCH v6 4/7] target/arm: Enable TTBCR_EAE for ARMv8-R AArch32 tobias.roehmel
2022-12-06 10:25 ` [PATCH v6 5/7] target/arm: Add PMSAv8r registers tobias.roehmel
2022-12-06 10:25 ` [PATCH v6 6/7] target/arm: Add PMSAv8r functionality tobias.roehmel
2022-12-06 10:25 ` [PATCH v6 7/7] target/arm: Add ARM Cortex-R52 CPU tobias.roehmel
2022-12-06 10:39 ` [PATCH v6 0/7] " Philippe Mathieu-Daudé
2022-12-06 11:43   ` Tobias Roehmel
2022-12-06 12:00     ` Philippe Mathieu-Daudé
2022-12-19 17:05 ` Peter Maydell
2022-12-27  7:34   ` Tobias Röhmel

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