From: Bin Meng <bmeng@tinylab.org>
To: qemu-devel@nongnu.org
Cc: Alistair Francis <alistair.francis@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
qemu-riscv@nongnu.org
Subject: [PATCH v2 07/16] hw/intc: sifive_plic: Improve robustness of the PLIC config parser
Date: Wed, 7 Dec 2022 18:03:26 +0800 [thread overview]
Message-ID: <20221207100335.290481-7-bmeng@tinylab.org> (raw)
In-Reply-To: <20221207100335.290481-1-bmeng@tinylab.org>
At present the PLIC config parser can only handle legal config string
like "MS,MS". However if a config string like ",MS,MS,,MS,MS,," is
given the parser won't get the correct configuration.
This commit improves the config parser to make it more robust.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
---
(no changes since v1)
hw/intc/sifive_plic.c | 24 ++++++++++++++++--------
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c
index 936dcf74bc..c9af94a888 100644
--- a/hw/intc/sifive_plic.c
+++ b/hw/intc/sifive_plic.c
@@ -290,7 +290,7 @@ static void sifive_plic_reset(DeviceState *dev)
*/
static void parse_hart_config(SiFivePLICState *plic)
{
- int addrid, hartid, modes;
+ int addrid, hartid, modes, m;
const char *p;
char c;
@@ -299,11 +299,13 @@ static void parse_hart_config(SiFivePLICState *plic)
p = plic->hart_config;
while ((c = *p++)) {
if (c == ',') {
- addrid += ctpop8(modes);
- modes = 0;
- hartid++;
+ if (modes) {
+ addrid += ctpop8(modes);
+ hartid++;
+ modes = 0;
+ }
} else {
- int m = 1 << char_to_mode(c);
+ m = 1 << char_to_mode(c);
if (modes == (modes | m)) {
error_report("plic: duplicate mode '%c' in config: %s",
c, plic->hart_config);
@@ -314,8 +316,9 @@ static void parse_hart_config(SiFivePLICState *plic)
}
if (modes) {
addrid += ctpop8(modes);
+ hartid++;
+ modes = 0;
}
- hartid++;
plic->num_addrs = addrid;
plic->num_harts = hartid;
@@ -326,11 +329,16 @@ static void parse_hart_config(SiFivePLICState *plic)
p = plic->hart_config;
while ((c = *p++)) {
if (c == ',') {
- hartid++;
+ if (modes) {
+ hartid++;
+ modes = 0;
+ }
} else {
+ m = char_to_mode(c);
plic->addr_config[addrid].addrid = addrid;
plic->addr_config[addrid].hartid = hartid;
- plic->addr_config[addrid].mode = char_to_mode(c);
+ plic->addr_config[addrid].mode = m;
+ modes |= (1 << m);
addrid++;
}
}
--
2.34.1
next prev parent reply other threads:[~2022-12-07 10:04 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-07 10:03 [PATCH v2 01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC Bin Meng
2022-12-07 10:03 ` [PATCH v2 02/16] hw/intc: Select MSI_NONBROKEN in RISC-V AIA interrupt controllers Bin Meng
2022-12-08 10:38 ` Philippe Mathieu-Daudé
2022-12-07 10:03 ` [PATCH v2 03/16] hw/riscv: Fix opentitan dependency to SIFIVE_PLIC Bin Meng
2022-12-07 10:03 ` [PATCH v2 04/16] hw/riscv: Sort machines Kconfig options in alphabetical order Bin Meng
2022-12-08 10:40 ` Philippe Mathieu-Daudé
2022-12-08 22:45 ` Wilfred Mallawa
2022-12-07 10:03 ` [PATCH v2 05/16] hw/riscv: spike: Remove misleading comments Bin Meng
2022-12-07 10:03 ` [PATCH v2 06/16] hw/intc: sifive_plic: Drop PLICMode_H Bin Meng
2022-12-07 10:03 ` Bin Meng [this message]
2022-12-07 10:03 ` [PATCH v2 08/16] hw/intc: sifive_plic: Use error_setg() to propagate the error up via errp in sifive_plic_realize() Bin Meng
2022-12-08 4:18 ` Alistair Francis
2022-12-08 10:40 ` Philippe Mathieu-Daudé
2022-12-07 10:03 ` [PATCH v2 09/16] hw/intc: sifive_plic: Update "num-sources" property default value Bin Meng
2022-12-07 10:03 ` [PATCH v2 10/16] hw/riscv: microchip_pfsoc: Fix the number of interrupt sources of PLIC Bin Meng
2022-12-07 10:03 ` [PATCH v2 11/16] hw/riscv: sifive_e: " Bin Meng
2022-12-07 10:03 ` [PATCH v2 12/16] hw/riscv: sifive_u: Avoid using magic number for "riscv, ndev" Bin Meng
2022-12-07 10:03 ` [PATCH v2 13/16] hw/riscv: virt: Fix the value of "riscv, ndev" in the dtb Bin Meng
2022-12-07 10:03 ` [PATCH v2 14/16] hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0 Bin Meng
2022-12-08 22:49 ` Wilfred Mallawa
2022-12-07 10:03 ` [PATCH v2 15/16] hw/riscv: opentitan: Drop "hartid-base" and "priority-base" initialization Bin Meng
2022-12-07 10:03 ` [PATCH v2 16/16] hw/intc: sifive_plic: Fix the pending register range check Bin Meng
2022-12-08 10:38 ` [PATCH v2 01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC Philippe Mathieu-Daudé
2022-12-08 22:46 ` Wilfred Mallawa
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