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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id k27-20020a5d525b000000b00242269c8b8esm22276667wrc.25.2022.12.08.08.01.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 08:01:40 -0800 (PST) Date: Thu, 8 Dec 2022 17:01:39 +0100 From: Igor Mammedov To: Gerd Hoffmann Cc: Kevin O'Connor , seabios@seabios.org, qemu-devel@nongnu.org Subject: Re: [SeaBIOS] Re: [PATCH 4/4] be less conservative with the 64bit pci io window Message-ID: <20221208170139.634adabd@imammedo.users.ipa.redhat.com> In-Reply-To: <20221123102508.zagkzmxlk3zdln5c@sirius.home.kraxel.org> References: <20221121103213.1675568-1-kraxel@redhat.com> <20221121103213.1675568-5-kraxel@redhat.com> <20221123102508.zagkzmxlk3zdln5c@sirius.home.kraxel.org> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.35; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, 23 Nov 2022 11:25:08 +0100 Gerd Hoffmann wrote: > On Tue, Nov 22, 2022 at 01:43:16PM -0500, Kevin O'Connor wrote: > > On Mon, Nov 21, 2022 at 11:32:13AM +0100, Gerd Hoffmann wrote: > > > Current seabios code will only enable and use the 64bit pci io window in > > > case it runs out of space in the 32bit pci mmio window below 4G. > > > > > > This patch will also enable the 64bit pci io window when > > > (a) RAM above 4G is present, and > > > (b) the physical address space size is known, and > > > (c) seabios is running on a 64bit capable processor. > > > > > > This operates with the assumption that guests which are ok with memory > > > above 4G most likely can handle mmio above 4G too. > > > > Thanks. In general, the series looks good to me. Can you elaborate > > on the background to this change though? It sounds like there is a > > (small) risk of a regression, so I think it would be good to have a > > high level understanding of what is driving this memory reorg. > > Well, the idea is to adapt to the world moving forward. Running a > 64-bit capable OS is standard these days, and the resources needed > by devices (especially GPUs) are becoming larger and larger. > > Yes, there is the risk that (old) guests are unhappy with their > PCI bars suddenly being mapped above 4G. Can happen only in case > seabios handles pci initialization (i.e. when running on qemu, > otherwise coreboot initializes the pci bars). I hope the memory > check handles the 'old guest' case: when the guest can't handle > addresses above 4G it is unlikely that qemu is configured to have > memory mapped above 4G ... does it break 32-bit PAE enabled guests (which can have more then 4Gb RAM configured)? > > take care, > Gerd > > _______________________________________________ > SeaBIOS mailing list -- seabios@seabios.org > To unsubscribe send an email to seabios-leave@seabios.org >