From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Bernhard Beschow" <shentey@gmail.com>,
"Daniel P. Berrangé" <berrange@redhat.com>,
"Thomas Huth" <thuth@redhat.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH-for-8.0 5/7] hw/mips/malta: Explicit GT64120 endianness upon device creation
Date: Fri, 9 Dec 2022 16:15:31 +0100 [thread overview]
Message-ID: <20221209151533.69516-6-philmd@linaro.org> (raw)
In-Reply-To: <20221209151533.69516-1-philmd@linaro.org>
Propagate the controller endianess from the machine, setting
the "cpu-little-endian" property.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/mips/malta.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index ba92022f87..1f4e0c7acc 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -1390,7 +1390,9 @@ void mips_malta_init(MachineState *machine)
stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420);
/* Northbridge */
- dev = sysbus_create_simple("gt64120", -1, NULL);
+ dev = qdev_new("gt64120");
+ qdev_prop_set_bit(dev, "cpu-little-endian", !be);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci"));
/* Southbridge */
--
2.38.1
next prev parent reply other threads:[~2022-12-09 15:16 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-09 15:15 [PATCH-for-8.0 0/7] hw/mips: Make gt64xxx_pci.c endian-agnostic Philippe Mathieu-Daudé
2022-12-09 15:15 ` [PATCH-for-8.0 1/7] hw/mips/Kconfig: Introduce CONFIG_GT64120 to select gt64xxx_pci.c Philippe Mathieu-Daudé
2022-12-12 0:13 ` Bernhard Beschow
2022-12-12 8:02 ` Philippe Mathieu-Daudé
2022-12-12 20:11 ` Bernhard Beschow
2022-12-20 0:48 ` Richard Henderson
2022-12-09 15:15 ` [PATCH-for-8.0 2/7] hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole Philippe Mathieu-Daudé
2022-12-20 0:48 ` Richard Henderson
2022-12-09 15:15 ` [PATCH-for-8.0 3/7] hw/mips/gt64xxx_pci: Manage endian bits with the RegisterField API Philippe Mathieu-Daudé
2022-12-20 0:51 ` Richard Henderson
2022-12-09 15:15 ` [PATCH-for-8.0 4/7] hw/mips/gt64xxx_pci: Add a 'cpu-little-endian' qdev property Philippe Mathieu-Daudé
2022-12-20 0:52 ` Richard Henderson
2022-12-20 8:06 ` Philippe Mathieu-Daudé
2022-12-09 15:15 ` Philippe Mathieu-Daudé [this message]
2022-12-20 0:52 ` [PATCH-for-8.0 5/7] hw/mips/malta: Explicit GT64120 endianness upon device creation Richard Henderson
2022-12-20 8:30 ` Philippe Mathieu-Daudé
2022-12-20 11:32 ` Philippe Mathieu-Daudé
2022-12-09 15:15 ` [PATCH-for-8.0 6/7] hw/mips/meson: Make gt64xxx_pci.c endian-agnostic Philippe Mathieu-Daudé
2022-12-20 0:53 ` Richard Henderson
2022-12-09 15:15 ` [PATCH-for-8.0 7/7] hw/mips/gt64xxx_pci: Move it to hw/pci-host/ Philippe Mathieu-Daudé
2022-12-12 0:02 ` Bernhard Beschow
2022-12-20 0:55 ` Richard Henderson
2022-12-12 0:55 ` [PATCH-for-8.0 0/7] hw/mips: Make gt64xxx_pci.c endian-agnostic Bernhard Beschow
2022-12-12 7:30 ` Philippe Mathieu-Daudé
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