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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PATCH v2 2/7] hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole
Date: Tue, 20 Dec 2022 12:34:31 +0100	[thread overview]
Message-ID: <20221220113436.14299-3-philmd@linaro.org> (raw)
In-Reply-To: <20221220113436.14299-1-philmd@linaro.org>

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

Per the comment in the Malta board, the [0x0000.0000-0x2000.0000]
range is decoded by the GT64120, so move the "empty_slot" there.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221209151533.69516-3-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 configs/devices/mips-softmmu/common.mak | 1 -
 hw/mips/Kconfig                         | 1 +
 hw/mips/gt64xxx_pci.c                   | 8 ++++++++
 hw/mips/malta.c                         | 7 -------
 4 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/configs/devices/mips-softmmu/common.mak b/configs/devices/mips-softmmu/common.mak
index 416161f833..c2b5f322fc 100644
--- a/configs/devices/mips-softmmu/common.mak
+++ b/configs/devices/mips-softmmu/common.mak
@@ -26,7 +26,6 @@ CONFIG_IDE_ISA=y
 CONFIG_PFLASH_CFI01=y
 CONFIG_I8259=y
 CONFIG_MC146818RTC=y
-CONFIG_EMPTY_SLOT=y
 CONFIG_MIPS_CPS=y
 CONFIG_MIPS_ITU=y
 CONFIG_MALTA=y
diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
index d6bbbe7069..8f7bce38fb 100644
--- a/hw/mips/Kconfig
+++ b/hw/mips/Kconfig
@@ -64,4 +64,5 @@ config FW_CFG_MIPS
 config GT64120
     bool
     select PCI
+    select EMPTY_SLOT
     select I8259
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
index 19d0d9889f..1b9ac7f792 100644
--- a/hw/mips/gt64xxx_pci.c
+++ b/hw/mips/gt64xxx_pci.c
@@ -28,6 +28,7 @@
 #include "qemu/log.h"
 #include "hw/pci/pci.h"
 #include "hw/pci/pci_host.h"
+#include "hw/misc/empty_slot.h"
 #include "migration/vmstate.h"
 #include "hw/intc/i8259.h"
 #include "hw/irq.h"
@@ -1162,6 +1163,13 @@ static void gt64120_realize(DeviceState *dev, Error **errp)
                                 PCI_DEVFN(18, 0), TYPE_PCI_BUS);
 
     pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci");
+
+    /*
+     * The whole address space decoded by the GT-64120A doesn't generate
+     * exception when accessing invalid memory. Create an empty slot to
+     * emulate this feature.
+     */
+    empty_slot_init("GT64120", 0, 0x20000000);
 }
 
 static void gt64120_pci_realize(PCIDevice *d, Error **errp)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index c0a2e0ab04..ba92022f87 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -53,7 +53,6 @@
 #include "sysemu/runstate.h"
 #include "qapi/error.h"
 #include "qemu/error-report.h"
-#include "hw/misc/empty_slot.h"
 #include "sysemu/kvm.h"
 #include "semihosting/semihost.h"
 #include "hw/mips/cps.h"
@@ -1393,12 +1392,6 @@ void mips_malta_init(MachineState *machine)
     /* Northbridge */
     dev = sysbus_create_simple("gt64120", -1, NULL);
     pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci"));
-    /*
-     * The whole address space decoded by the GT-64120A doesn't generate
-     * exception when accessing invalid memory. Create an empty slot to
-     * emulate this feature.
-     */
-    empty_slot_init("GT64120", 0, 0x20000000);
 
     /* Southbridge */
     piix4 = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), true,
-- 
2.38.1



  parent reply	other threads:[~2022-12-20 11:39 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-20 11:34 [PATCH v2 0/7] hw/mips: Make gt64xxx_pci.c endian-agnostic Philippe Mathieu-Daudé
2022-12-20 11:34 ` [PATCH v2 1/7] hw/mips/Kconfig: Introduce CONFIG_GT64120 to select gt64xxx_pci.c Philippe Mathieu-Daudé
2022-12-20 11:34 ` Philippe Mathieu-Daudé [this message]
2022-12-20 11:34 ` [PATCH v2 3/7] hw/mips/gt64xxx_pci: Manage endian bits with the RegisterFields API Philippe Mathieu-Daudé
2022-12-21  0:54   ` Richard Henderson
2022-12-20 11:34 ` [PATCH v2 4/7] hw/mips/gt64xxx_pci: Add a 'cpu-little-endian' qdev property Philippe Mathieu-Daudé
2022-12-21  0:56   ` Richard Henderson
2022-12-20 11:34 ` [PATCH v2 5/7] hw/mips/malta: Explicit GT64120 endianness upon device creation Philippe Mathieu-Daudé
2022-12-20 11:34 ` [PATCH v2 6/7] hw/mips/meson: Make gt64xxx_pci.c endian-agnostic Philippe Mathieu-Daudé
2022-12-20 11:34 ` [PATCH v2 7/7] hw/mips/gt64xxx_pci: Move it to hw/pci-host/ Philippe Mathieu-Daudé
2022-12-21  7:06 ` [PATCH v2 0/7] hw/mips: Make gt64xxx_pci.c endian-agnostic Philippe Mathieu-Daudé

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