From: Fabiano Rosas <farosas@suse.de>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Claudio Fontana" <cfontana@suse.de>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Alexander Graf" <agraf@csgraf.de>
Subject: [PATCH v2 4/5] target/arm: Move PC alignment check
Date: Tue, 20 Dec 2022 19:04:25 -0300 [thread overview]
Message-ID: <20221220220426.8827-5-farosas@suse.de> (raw)
In-Reply-To: <20221220220426.8827-1-farosas@suse.de>
Move this earlier to make the next patch diff cleaner. While here
update the comment slightly to not give the impression that the
misalignment affects only TCG.
Signed-off-by: Fabiano Rosas <farosas@suse.de>
---
target/arm/machine.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 54c5c62433..a186787d2b 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -811,6 +811,15 @@ static int cpu_post_load(void *opaque, int version_id)
}
}
+ /*
+ * Misaligned thumb pc is architecturally impossible. Fail the
+ * incoming migration. For TCG it would trigger the assert in
+ * thumb_tr_translate_insn().
+ */
+ if (!is_a64(env) && env->thumb && (env->regs[15] & 1)) {
+ return -1;
+ }
+
hw_breakpoint_update_all(cpu);
hw_watchpoint_update_all(cpu);
@@ -828,15 +837,6 @@ static int cpu_post_load(void *opaque, int version_id)
}
}
- /*
- * Misaligned thumb pc is architecturally impossible.
- * We have an assert in thumb_tr_translate_insn to verify this.
- * Fail an incoming migrate to avoid this assert.
- */
- if (!is_a64(env) && env->thumb && (env->regs[15] & 1)) {
- return -1;
- }
-
if (!kvm_enabled()) {
pmu_op_finish(&cpu->env);
}
--
2.35.3
next prev parent reply other threads:[~2022-12-20 22:07 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-20 22:04 [PATCH v2 0/5] target/arm: Some CONFIG_TCG code movement Fabiano Rosas
2022-12-20 22:04 ` [PATCH v2 1/5] target/arm: rename handle_semihosting to tcg_handle_semihosting Fabiano Rosas
2022-12-20 22:04 ` [PATCH v2 2/5] target/arm: wrap psci call with tcg_enabled Fabiano Rosas
2022-12-20 22:04 ` [PATCH v2 3/5] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Fabiano Rosas
2022-12-20 22:04 ` Fabiano Rosas [this message]
2022-12-21 1:21 ` [PATCH v2 4/5] target/arm: Move PC alignment check Richard Henderson
2022-12-20 22:04 ` [PATCH v2 5/5] target/arm: only perform TCG cpu and machine inits if TCG enabled Fabiano Rosas
2022-12-21 1:23 ` Richard Henderson
2023-01-05 14:46 ` [PATCH v2 0/5] target/arm: Some CONFIG_TCG code movement Fabiano Rosas
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