qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Andrew Jeffery" <andrew@aj.id.au>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Igor Mitsyanko" <i.mitsyanko@gmail.com>,
	"Joel Stanley" <joel@jms.id.au>,
	"Havard Skinnemoen" <hskinnemoen@google.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Alistair Francis" <alistair@alistair23.me>,
	qemu-arm@nongnu.org, "Tyrone Ting" <kfting@nuvoton.com>
Subject: [PATCH 2/6] hw/arm/raspi: Fix smpboot[] on big-endian hosts
Date: Thu, 22 Dec 2022 22:55:45 +0100	[thread overview]
Message-ID: <20221222215549.86872-3-philmd@linaro.org> (raw)
In-Reply-To: <20221222215549.86872-1-philmd@linaro.org>

ARM CPUs fetch instructions in little-endian.

smpboot[] encoded instructions are written in little-endian.
This is fine on little-endian host, but on big-endian ones
the smpboot[] array ends swapped. Use the const_le32()
macro so the instructions are always in little-endian in the
smpboot[] array.

Fixes: 1df7d1f930 ("raspi: add raspberry pi 2 machine")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/arm/raspi.c | 46 +++++++++++++++++++++++-----------------------
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 92d068d1f9..72572a45c2 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -125,18 +125,18 @@ static const char *board_type(uint32_t board_rev)
 static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info)
 {
     static const uint32_t smpboot[] = {
-        0xe1a0e00f, /*    mov     lr, pc */
-        0xe3a0fe00 + (BOARDSETUP_ADDR >> 4), /* mov pc, BOARDSETUP_ADDR */
-        0xee100fb0, /*    mrc     p15, 0, r0, c0, c0, 5;get core ID */
-        0xe7e10050, /*    ubfx    r0, r0, #0, #2       ;extract LSB */
-        0xe59f5014, /*    ldr     r5, =0x400000CC      ;load mbox base */
-        0xe320f001, /* 1: yield */
-        0xe7953200, /*    ldr     r3, [r5, r0, lsl #4] ;read mbox for our core*/
-        0xe3530000, /*    cmp     r3, #0               ;spin while zero */
-        0x0afffffb, /*    beq     1b */
-        0xe7853200, /*    str     r3, [r5, r0, lsl #4] ;clear mbox */
-        0xe12fff13, /*    bx      r3                   ;jump to target */
-        0x400000cc, /* (constant: mailbox 3 read/clear base) */
+        const_le32(0xe1a0e00f), /*    mov   lr, pc */
+        const_le32(0xe3a0fe00 + (BOARDSETUP_ADDR >> 4)), /* mov pc, BOARDSETUP_ADDR */
+        const_le32(0xee100fb0), /*    mrc   p15, 0, r0, c0, c0, 5;get core ID */
+        const_le32(0xe7e10050), /*    ubfx  r0, r0, #0, #2       ;extract LSB */
+        const_le32(0xe59f5014), /*    ldr   r5, =0x400000CC      ;load mbox base */
+        const_le32(0xe320f001), /* 1: yield */
+        const_le32(0xe7953200), /*    ldr   r3, [r5, r0, lsl #4] ;read mbox for our core*/
+        const_le32(0xe3530000), /*    cmp   r3, #0               ;spin while zero */
+        const_le32(0x0afffffb), /*    beq   1b */
+        const_le32(0xe7853200), /*    str   r3, [r5, r0, lsl #4] ;clear mbox */
+        const_le32(0xe12fff13), /*    bx    r3                   ;jump to target */
+        const_le32(0x400000cc), /* (constant: mailbox 3 read/clear base) */
     };
 
     /* check that we don't overrun board setup vectors */
@@ -162,17 +162,17 @@ static void write_smpboot64(ARMCPU *cpu, const struct arm_boot_info *info)
      * a rom blob, so that the reset for ROM contents zeroes them for us.
      */
     static const uint32_t smpboot[] = {
-        0xd2801b05, /*        mov     x5, 0xd8 */
-        0xd53800a6, /*        mrs     x6, mpidr_el1 */
-        0x924004c6, /*        and     x6, x6, #0x3 */
-        0xd503205f, /* spin:  wfe */
-        0xf86678a4, /*        ldr     x4, [x5,x6,lsl #3] */
-        0xb4ffffc4, /*        cbz     x4, spin */
-        0xd2800000, /*        mov     x0, #0x0 */
-        0xd2800001, /*        mov     x1, #0x0 */
-        0xd2800002, /*        mov     x2, #0x0 */
-        0xd2800003, /*        mov     x3, #0x0 */
-        0xd61f0080, /*        br      x4 */
+        const_le32(0xd2801b05), /*        mov     x5, 0xd8 */
+        const_le32(0xd53800a6), /*        mrs     x6, mpidr_el1 */
+        const_le32(0x924004c6), /*        and     x6, x6, #0x3 */
+        const_le32(0xd503205f), /* spin:  wfe */
+        const_le32(0xf86678a4), /*        ldr     x4, [x5,x6,lsl #3] */
+        const_le32(0xb4ffffc4), /*        cbz     x4, spin */
+        const_le32(0xd2800000), /*        mov     x0, #0x0 */
+        const_le32(0xd2800001), /*        mov     x1, #0x0 */
+        const_le32(0xd2800002), /*        mov     x2, #0x0 */
+        const_le32(0xd2800003), /*        mov     x3, #0x0 */
+        const_le32(0xd61f0080), /*        br      x4 */
     };
 
     static const uint64_t spintables[] = {
-- 
2.38.1



  parent reply	other threads:[~2022-12-22 21:56 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-22 21:55 [PATCH 0/6] hw/arm: Fix smpboot[] on big-endian hosts and remove tswap32() Philippe Mathieu-Daudé
2022-12-22 21:55 ` [PATCH 1/6] hw/arm/aspeed: Fix smpboot[] on big-endian hosts Philippe Mathieu-Daudé
2022-12-23  7:24   ` Cédric Le Goater
2023-01-03 17:33   ` Peter Maydell
2023-01-04  8:43     ` Cédric Le Goater
2023-01-04 22:35       ` Philippe Mathieu-Daudé
2023-01-04 23:25         ` Cédric Le Goater
2022-12-22 21:55 ` Philippe Mathieu-Daudé [this message]
2022-12-22 21:55 ` [PATCH 3/6] hw/arm/exynos4210: Remove tswap32() calls and constify smpboot[] Philippe Mathieu-Daudé
2022-12-22 21:55 ` [PATCH 4/6] hw/arm/npcm7xx: " Philippe Mathieu-Daudé
2022-12-22 21:55 ` [PATCH 5/6] hw/arm/xilinx_zynq: " Philippe Mathieu-Daudé
2022-12-23  3:54   ` Edgar E. Iglesias
2022-12-23 10:01     ` Philippe Mathieu-Daudé
2022-12-23 10:05       ` Philippe Mathieu-Daudé
2022-12-22 21:55 ` [PATCH 6/6] hw/arm/boot: Remove tswap32() calls and constify board_setup_blob[] Philippe Mathieu-Daudé
2022-12-22 21:59 ` [PATCH 0/6] hw/arm: Fix smpboot[] on big-endian hosts and remove tswap32() Philippe Mathieu-Daudé
2022-12-24 23:32 ` Richard Henderson
2023-01-03 17:43 ` Peter Maydell
2023-01-04 22:51   ` Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221222215549.86872-3-philmd@linaro.org \
    --to=philmd@linaro.org \
    --cc=alistair@alistair23.me \
    --cc=andrew@aj.id.au \
    --cc=clg@kaod.org \
    --cc=edgar.iglesias@gmail.com \
    --cc=hskinnemoen@google.com \
    --cc=i.mitsyanko@gmail.com \
    --cc=joel@jms.id.au \
    --cc=kfting@nuvoton.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).