From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Joel Stanley" <joel@jms.id.au>,
"Troy Lee" <troy_lee@aspeedtech.com>,
"Beraldo Leal" <bleal@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
"Andrew Jeffery" <andrew@aj.id.au>,
"Chin-Ting Kuo" <chin-ting_kuo@aspeedtech.com>,
"Peter Delevoryas" <peter@pjd.dev>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Jamin Lin" <jamin_lin@aspeedtech.com>,
"Peter Delevoryas" <pdel@fb.com>,
"Peter Delevoryas" <pdel@meta.com>,
qemu-arm@nongnu.org, "Cédric Le Goater" <clg@kaod.org>,
"Cleber Rosa" <crosa@redhat.com>
Subject: [PATCH v2 04/11] hw/arm/aspeed: Use the IEC binary prefix definitions
Date: Fri, 30 Dec 2022 12:34:57 +0100 [thread overview]
Message-ID: <20221230113504.37032-5-philmd@linaro.org> (raw)
In-Reply-To: <20221230113504.37032-1-philmd@linaro.org>
IEC binary prefixes ease code review: the unit is explicit.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
---
hw/arm/aspeed_ast10x0.c | 3 ++-
hw/arm/aspeed_ast2600.c | 3 ++-
hw/arm/aspeed_soc.c | 4 ++--
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c
index 122b3fd3f3..3500294df7 100644
--- a/hw/arm/aspeed_ast10x0.c
+++ b/hw/arm/aspeed_ast10x0.c
@@ -10,6 +10,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"
@@ -348,7 +349,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass *klass, void *data)
sc->name = "ast1030-a1";
sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4");
sc->silicon_rev = AST1030_A1_SILICON_REV;
- sc->sram_size = 0xc0000;
+ sc->sram_size = 768 * KiB;
sc->spis_num = 2;
sc->ehcis_num = 0;
sc->wdts_num = 4;
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index a79e05ddbd..72df72a540 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -8,6 +8,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/misc/unimp.h"
#include "hw/arm/aspeed_soc.h"
@@ -619,7 +620,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data)
sc->name = "ast2600-a3";
sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
sc->silicon_rev = AST2600_A3_SILICON_REV;
- sc->sram_size = 0x16400;
+ sc->sram_size = 89 * KiB;
sc->spis_num = 2;
sc->ehcis_num = 2;
sc->wdts_num = 4;
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 2c0924d311..677342c9ed 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -517,7 +517,7 @@ static void aspeed_soc_ast2400_class_init(ObjectClass *oc, void *data)
sc->name = "ast2400-a1";
sc->cpu_type = ARM_CPU_TYPE_NAME("arm926");
sc->silicon_rev = AST2400_A1_SILICON_REV;
- sc->sram_size = 0x8000;
+ sc->sram_size = 32 * KiB;
sc->spis_num = 1;
sc->ehcis_num = 1;
sc->wdts_num = 2;
@@ -544,7 +544,7 @@ static void aspeed_soc_ast2500_class_init(ObjectClass *oc, void *data)
sc->name = "ast2500-a1";
sc->cpu_type = ARM_CPU_TYPE_NAME("arm1176");
sc->silicon_rev = AST2500_A1_SILICON_REV;
- sc->sram_size = 0x9000;
+ sc->sram_size = 36 * KiB;
sc->spis_num = 2;
sc->ehcis_num = 2;
sc->wdts_num = 3;
--
2.38.1
next prev parent reply other threads:[~2022-12-30 11:37 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-30 11:34 [PATCH v2 00/11] hw/arm/aspeed_ast10x0: Map more peripherals & few more fixes Philippe Mathieu-Daudé
2022-12-30 11:34 ` [PATCH v2 01/11] hw/watchdog/wdt_aspeed: Rename MMIO region size as 'iosize' Philippe Mathieu-Daudé
2022-12-31 22:43 ` Dong, Eddie
2023-01-02 12:30 ` Cédric Le Goater
2023-01-18 8:46 ` Cédric Le Goater
2023-01-03 15:25 ` Peter Delevoryas
2022-12-30 11:34 ` [PATCH v2 02/11] hw/watchdog/wdt_aspeed: Extend MMIO range to cover more registers Philippe Mathieu-Daudé
2022-12-30 12:31 ` Philippe Mathieu-Daudé
2022-12-30 18:31 ` Peter Delevoryas
2022-12-31 22:52 ` Dong, Eddie
2023-01-02 10:05 ` Philippe Mathieu-Daudé
2023-01-02 13:31 ` Cédric Le Goater
2023-01-03 15:31 ` Peter Delevoryas
2023-01-03 15:48 ` Cédric Le Goater
2023-01-03 15:52 ` Peter Delevoryas
2023-01-18 8:48 ` Cédric Le Goater
2022-12-30 11:34 ` [PATCH v2 03/11] hw/watchdog/wdt_aspeed: Log unimplemented registers as UNIMP level Philippe Mathieu-Daudé
2022-12-30 18:29 ` Peter Delevoryas
2023-01-02 13:35 ` Cédric Le Goater
2022-12-30 11:34 ` Philippe Mathieu-Daudé [this message]
2023-01-02 13:36 ` [PATCH v2 04/11] hw/arm/aspeed: Use the IEC binary prefix definitions Cédric Le Goater
2023-01-18 6:53 ` Joel Stanley
2023-01-18 7:32 ` Cédric Le Goater
2023-01-18 8:37 ` Philippe Mathieu-Daudé
2023-01-18 8:43 ` Cédric Le Goater
2022-12-30 11:34 ` [PATCH v2 05/11] hw/misc/aspeed_hace: Do not crash if address_space_map() failed Philippe Mathieu-Daudé
2023-01-02 13:37 ` Cédric Le Goater
2022-12-30 11:34 ` [PATCH v2 06/11] hw/arm/aspeed_ast10x0: Add various unimplemented peripherals Philippe Mathieu-Daudé
2023-01-02 13:38 ` Cédric Le Goater
2022-12-30 11:35 ` [PATCH v2 07/11] hw/arm/aspeed_ast10x0: Map I3C peripheral Philippe Mathieu-Daudé
2023-01-02 13:40 ` Cédric Le Goater
2022-12-30 11:35 ` [PATCH v2 08/11] hw/arm/aspeed_ast10x0: Map the secure SRAM Philippe Mathieu-Daudé
2023-01-02 13:17 ` Cédric Le Goater
2022-12-30 11:35 ` [PATCH v2 09/11] hw/arm/aspeed_ast10x0: Map HACE peripheral Philippe Mathieu-Daudé
2023-01-02 14:07 ` Cédric Le Goater
2022-12-30 11:35 ` [PATCH v2 10/11] hw/arm/aspeed_ast10x0: Add TODO comment to use Cortex-M4F Philippe Mathieu-Daudé
2023-01-02 13:45 ` Cédric Le Goater
2022-12-30 11:35 ` [PATCH v2 11/11] tests/avocado: Test Aspeed Zephyr SDK v00.01.08 on AST1030 board Philippe Mathieu-Daudé
2023-01-02 13:46 ` Cédric Le Goater
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