From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
"Stefano Stabellini" <sstabellini@kernel.org>,
xen-devel@lists.xenproject.org,
"Hervé Poussineau" <hpoussin@reactos.org>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Paul Durrant" <paul@xen.org>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Anthony Perard" <anthony.perard@citrix.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Chuck Zmudzinski" <brchuckz@aol.com>,
"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v2 3/6] hw/isa/piix: Wire up Xen PCI IRQ handling outside of PIIX3
Date: Wed, 4 Jan 2023 15:44:34 +0100 [thread overview]
Message-ID: <20230104144437.27479-4-shentey@gmail.com> (raw)
In-Reply-To: <20230104144437.27479-1-shentey@gmail.com>
xen_intx_set_irq() doesn't depend on PIIX state. In order to resolve
TYPE_PIIX3_XEN_DEVICE and in order to make Xen agnostic about the
precise south bridge being used, set up Xen's PCI IRQ handling of PIIX3
in the board.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
hw/i386/pc_piix.c | 12 ++++++++++++
hw/isa/piix.c | 24 +-----------------------
2 files changed, 13 insertions(+), 23 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index aacdb72b7c..792dcd3ce8 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -67,6 +67,7 @@
#include "kvm/kvm-cpu.h"
#define MAX_IDE_BUS 2
+#define XEN_IOAPIC_NUM_PIRQS 128ULL
#ifdef CONFIG_IDE_ISA
static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
@@ -246,6 +247,17 @@ static void pc_init1(MachineState *machine,
&error_abort);
pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
+ if (xen_enabled()) {
+ /*
+ * Xen supports additional interrupt routes from the PCI devices to
+ * the IOAPIC: the four pins of each PCI device on the bus are also
+ * connected to the IOAPIC directly.
+ * These additional routes can be discovered through ACPI.
+ */
+ pci_bus_irqs(pci_bus, xen_intx_set_irq, pci_dev,
+ XEN_IOAPIC_NUM_PIRQS);
+ }
+
dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "pic"));
for (i = 0; i < ISA_NUM_IRQS; i++) {
qdev_connect_gpio_out(dev, i, x86ms->gsi[i]);
diff --git a/hw/isa/piix.c b/hw/isa/piix.c
index 25707479eb..ac04781f46 100644
--- a/hw/isa/piix.c
+++ b/hw/isa/piix.c
@@ -38,8 +38,6 @@
#include "migration/vmstate.h"
#include "hw/acpi/acpi_aml_interface.h"
-#define XEN_IOAPIC_NUM_PIRQS 128ULL
-
static void piix_set_irq_pic(PIIXState *piix, int pic_irq)
{
qemu_set_irq(piix->pic.in_irqs[pic_irq],
@@ -487,33 +485,13 @@ static const TypeInfo piix3_info = {
.class_init = piix3_class_init,
};
-static void piix3_xen_realize(PCIDevice *dev, Error **errp)
-{
- ERRP_GUARD();
- PIIXState *piix3 = PIIX_PCI_DEVICE(dev);
- PCIBus *pci_bus = pci_get_bus(dev);
-
- piix3_realize(dev, errp);
- if (*errp) {
- return;
- }
-
- /*
- * Xen supports additional interrupt routes from the PCI devices to
- * the IOAPIC: the four pins of each PCI device on the bus are also
- * connected to the IOAPIC directly.
- * These additional routes can be discovered through ACPI.
- */
- pci_bus_irqs(pci_bus, xen_intx_set_irq, piix3, XEN_IOAPIC_NUM_PIRQS);
-}
-
static void piix3_xen_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->config_write = piix3_write_config_xen;
- k->realize = piix3_xen_realize;
+ k->realize = piix3_realize;
/* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
dc->vmsd = &vmstate_piix3;
--
2.39.0
next prev parent reply other threads:[~2023-01-04 14:46 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-04 14:44 [PATCH v2 0/6] Resolve TYPE_PIIX3_XEN_DEVICE Bernhard Beschow
2023-01-04 14:44 ` [PATCH v2 1/6] include/hw/xen/xen: Rename xen_piix3_set_irq() to xen_intx_set_irq() Bernhard Beschow
2023-01-04 15:17 ` Philippe Mathieu-Daudé
2023-01-04 14:44 ` [PATCH v2 2/6] hw/isa/piix: Reuse piix3_realize() in piix3_xen_realize() Bernhard Beschow
2023-01-04 14:44 ` Bernhard Beschow [this message]
2023-01-04 15:18 ` [PATCH v2 3/6] hw/isa/piix: Wire up Xen PCI IRQ handling outside of PIIX3 Philippe Mathieu-Daudé
2023-01-06 17:35 ` David Woodhouse
2023-01-06 17:46 ` Chuck Zmudzinski
2023-01-06 18:39 ` Chuck Zmudzinski
2023-01-07 10:58 ` Bernhard Beschow
2023-01-04 14:44 ` [PATCH v2 4/6] hw/isa/piix: Avoid Xen-specific variant of piix_write_config() Bernhard Beschow
2023-01-04 14:44 ` [PATCH v2 5/6] hw/isa/piix: Resolve redundant k->config_write assignments Bernhard Beschow
2023-01-04 15:19 ` Philippe Mathieu-Daudé
2023-01-04 14:44 ` [PATCH v2 6/6] hw/isa/piix: Resolve redundant TYPE_PIIX3_XEN_DEVICE Bernhard Beschow
2023-01-04 15:35 ` Philippe Mathieu-Daudé
2023-01-04 17:54 ` Chuck Zmudzinski
2023-01-04 18:48 ` Philippe Mathieu-Daudé
2023-01-04 19:29 ` Chuck Zmudzinski
2023-01-04 20:31 ` Bernhard Beschow
2023-01-04 20:57 ` Chuck Zmudzinski
2023-01-04 22:18 ` Philippe Mathieu-Daudé
2023-01-05 2:34 ` Chuck Zmudzinski
2023-01-04 20:44 ` Bernhard Beschow
2023-01-04 20:50 ` Chuck Zmudzinski
2023-01-06 11:57 ` Bernhard Beschow
2023-01-06 12:25 ` Philippe Mathieu-Daudé
2023-01-06 19:08 ` Chuck Zmudzinski
2023-01-06 23:04 ` Chuck Zmudzinski
2023-01-07 1:08 ` Chuck Zmudzinski
2023-01-07 11:05 ` Bernhard Beschow
2023-01-07 18:08 ` Chuck Zmudzinski
2023-01-04 16:42 ` Chuck Zmudzinski
2023-01-04 19:45 ` Bernhard Beschow
2023-01-04 22:35 ` Philippe Mathieu-Daudé
2023-01-05 1:57 ` Chuck Zmudzinski
2023-01-05 2:25 ` Chuck Zmudzinski
2023-01-17 22:51 ` [PATCH v2 0/6] Resolve TYPE_PIIX3_XEN_DEVICE Bernhard Beschow
2023-01-18 10:13 ` Michael S. Tsirkin
2023-01-24 16:11 ` Anthony PERARD via
2023-01-24 17:07 ` Bernhard Beschow
2023-02-01 8:11 ` Bernhard Beschow
2023-02-09 21:53 ` Bernhard Beschow
2023-03-11 22:20 ` Chuck Zmudzinski
2023-03-12 9:22 ` Bernhard Beschow
2023-03-12 21:02 ` Chuck Zmudzinski
2023-03-12 22:46 ` Bernhard Beschow
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