From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
qemu-block@nongnu.org, "Hervé Poussineau" <hpoussin@reactos.org>,
"Ani Sinha" <ani@anisinha.ca>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"John Snow" <jsnow@redhat.com>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Bernhard Beschow" <shentey@gmail.com>,
"Thomas Huth" <thuth@redhat.com>
Subject: [PATCH v5 31/31] hw/isa/piix: Share PIIX3's base class with PIIX4
Date: Thu, 5 Jan 2023 15:32:28 +0100 [thread overview]
Message-ID: <20230105143228.244965-32-shentey@gmail.com> (raw)
In-Reply-To: <20230105143228.244965-1-shentey@gmail.com>
Having a common base class will allow for substituting PIIX3 with PIIX4
and vice versa. Moreover, it makes PIIX4 implement the
acpi-dev-aml-interface.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20221022150508.26830-42-shentey@gmail.com>
---
hw/isa/piix.c | 49 ++++++++++++++++++++++---------------------------
1 file changed, 22 insertions(+), 27 deletions(-)
diff --git a/hw/isa/piix.c b/hw/isa/piix.c
index f125a6175f..54a1246a9d 100644
--- a/hw/isa/piix.c
+++ b/hw/isa/piix.c
@@ -396,13 +396,12 @@ static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
}
}
-static void pci_piix3_init(Object *obj)
+static void pci_piix_init(Object *obj)
{
PIIXState *d = PIIX_PCI_DEVICE(obj);
object_initialize_child(obj, "pic", &d->pic, TYPE_ISA_PIC);
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
- object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE);
}
static Property pci_piix_props[] = {
@@ -413,7 +412,7 @@ static Property pci_piix_props[] = {
DEFINE_PROP_END_OF_LIST(),
};
-static void pci_piix3_class_init(ObjectClass *klass, void *data)
+static void pci_piix_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
@@ -421,11 +420,8 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data)
dc->reset = piix_reset;
dc->desc = "ISA bridge";
- dc->vmsd = &vmstate_piix3;
dc->hotpluggable = false;
k->vendor_id = PCI_VENDOR_ID_INTEL;
- /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
- k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
k->class_id = PCI_CLASS_BRIDGE_ISA;
/*
* Reason: part of PIIX3 southbridge, needs to be wired up by
@@ -440,9 +436,9 @@ static const TypeInfo piix_pci_type_info = {
.name = TYPE_PIIX_PCI_DEVICE,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PIIXState),
- .instance_init = pci_piix3_init,
+ .instance_init = pci_piix_init,
.abstract = true,
- .class_init = pci_piix3_class_init,
+ .class_init = pci_piix_class_init,
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
{ TYPE_ACPI_DEV_AML_IF },
@@ -465,17 +461,29 @@ static void piix3_realize(PCIDevice *dev, Error **errp)
pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq);
}
+static void piix3_init(Object *obj)
+{
+ PIIXState *d = PIIX_PCI_DEVICE(obj);
+
+ object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE);
+}
+
static void piix3_class_init(ObjectClass *klass, void *data)
{
+ DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->config_write = piix_write_config;
k->realize = piix3_realize;
+ /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
+ k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
+ dc->vmsd = &vmstate_piix3;
}
static const TypeInfo piix3_info = {
.name = TYPE_PIIX3_DEVICE,
.parent = TYPE_PIIX_PCI_DEVICE,
+ .instance_init = piix3_init,
.class_init = piix3_class_init,
};
@@ -501,15 +509,20 @@ static void piix3_xen_realize(PCIDevice *dev, Error **errp)
static void piix3_xen_class_init(ObjectClass *klass, void *data)
{
+ DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->config_write = piix3_write_config_xen;
k->realize = piix3_xen_realize;
+ /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
+ k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
+ dc->vmsd = &vmstate_piix3;
}
static const TypeInfo piix3_xen_info = {
.name = TYPE_PIIX3_XEN_DEVICE,
.parent = TYPE_PIIX_PCI_DEVICE,
+ .instance_init = piix3_init,
.class_init = piix3_xen_class_init,
};
@@ -540,8 +553,6 @@ static void piix4_init(Object *obj)
{
PIIXState *s = PIIX_PCI_DEVICE(obj);
- object_initialize_child(obj, "pic", &s->pic, TYPE_ISA_PIC);
- object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC);
object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE);
}
@@ -552,31 +563,15 @@ static void piix4_class_init(ObjectClass *klass, void *data)
k->config_write = piix_write_config;
k->realize = piix4_realize;
- k->vendor_id = PCI_VENDOR_ID_INTEL;
k->device_id = PCI_DEVICE_ID_INTEL_82371AB_0;
- k->class_id = PCI_CLASS_BRIDGE_ISA;
- dc->reset = piix_reset;
- dc->desc = "ISA bridge";
dc->vmsd = &vmstate_piix4;
- /*
- * Reason: part of PIIX4 southbridge, needs to be wired up,
- * e.g. by mips_malta_init()
- */
- dc->user_creatable = false;
- dc->hotpluggable = false;
- device_class_set_props(dc, pci_piix_props);
}
static const TypeInfo piix4_info = {
.name = TYPE_PIIX4_PCI_DEVICE,
- .parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(PIIXState),
+ .parent = TYPE_PIIX_PCI_DEVICE,
.instance_init = piix4_init,
.class_init = piix4_class_init,
- .interfaces = (InterfaceInfo[]) {
- { INTERFACE_CONVENTIONAL_PCI_DEVICE },
- { },
- },
};
static void piix3_register_types(void)
--
2.39.0
next prev parent reply other threads:[~2023-01-05 14:36 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-05 14:31 [PATCH v5 00/31] Consolidate PIIX south bridges Bernhard Beschow
2023-01-05 14:31 ` [PATCH v5 01/31] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition Bernhard Beschow
2023-01-05 14:31 ` [PATCH v5 02/31] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 03/31] hw/isa/piix4: Correct IRQRC[A:D] reset values Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 04/31] hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 05/31] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 06/31] hw/i386/pc_piix: Associate pci_map_irq_fn as soon as PCI bus is created Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 07/31] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 08/31] hw/i386/pc: Create RTC controllers in south bridges Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 09/31] hw/i386/pc: No need for rtc_state to be an out-parameter Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 10/31] hw/isa/piix3: Create USB controller in host device Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 11/31] hw/isa/piix3: Create power management " Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 12/31] hw/intc/i8259: Make using the isa_pic singleton more type-safe Bernhard Beschow
2023-01-07 23:28 ` Mark Cave-Ayland
2023-01-05 14:32 ` [PATCH v5 13/31] hw/intc/i8259: Introduce i8259 proxy "isa-pic" Bernhard Beschow
2023-01-07 23:45 ` Mark Cave-Ayland
2023-01-08 15:30 ` Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 14/31] hw/isa/piix3: Create ISA PIC in host device Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 15/31] hw/isa/piix3: Create IDE controller " Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 16/31] hw/isa/piix3: Wire up ACPI interrupt internally Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 17/31] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 18/31] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 19/31] hw/isa/piix3: Rename piix3_reset() " Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 20/31] hw/isa/piix3: Drop the "3" from PIIX base class Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 21/31] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 22/31] hw/isa/piix4: Remove unused inbound ISA interrupt lines Bernhard Beschow
2023-01-07 23:47 ` Mark Cave-Ayland
2023-01-05 14:32 ` [PATCH v5 23/31] hw/isa/piix4: Use ISA PIC device Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 24/31] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2023-01-07 23:48 ` Mark Cave-Ayland
2023-01-08 15:31 ` Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 25/31] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 26/31] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 27/31] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 28/31] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 29/31] hw/isa/piix: Rename functions to be shared for interrupt triggering Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 30/31] hw/isa/piix: Consolidate IRQ triggering Bernhard Beschow
2023-01-05 14:32 ` Bernhard Beschow [this message]
2023-01-05 16:39 ` [PATCH v5 00/31] Consolidate PIIX south bridges Michael S. Tsirkin
2023-01-05 17:29 ` Bernhard Beschow
2023-01-07 23:57 ` Mark Cave-Ayland
2023-01-08 15:12 ` Bernhard Beschow
2023-01-08 18:28 ` Philippe Mathieu-Daudé
2023-01-08 21:18 ` Bernhard Beschow
2023-01-09 17:33 ` Bernhard Beschow
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