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charset=UTF-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=216.71.154.45; envelope-from=prvs=363443eaf=alistair.francis@opensource.wdc.com; helo=esa6.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Failure to set pc_succ_insn may result in a TB covering zero bytes, which triggers an assert within the code generator. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1224 Signed-off-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20221203175744.151365-1-richard.henderson@linaro.org> [ Changes by AF: - Add missing run-plugin-test-noc-% line ] Signed-off-by: Alistair Francis --- target/riscv/translate.c | 12 ++++-------- tests/tcg/Makefile.target | 2 ++ tests/tcg/riscv64/Makefile.target | 6 ++++++ tests/tcg/riscv64/test-noc.S | 32 +++++++++++++++++++++++++++++++ 4 files changed, 44 insertions(+), 8 deletions(-) create mode 100644 tests/tcg/riscv64/test-noc.S diff --git a/target/riscv/translate.c b/target/riscv/translate.c index cd5eb25ee8..160aefc3df 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1096,14 +1096,10 @@ static void decode_opc(CPURISCVState *env, DisasC= ontext *ctx, uint16_t opcode) ctx->virt_inst_excp =3D false; /* Check for compressed insn */ if (insn_len(opcode) =3D=3D 2) { - if (!has_ext(ctx, RVC)) { - gen_exception_illegal(ctx); - } else { - ctx->opcode =3D opcode; - ctx->pc_succ_insn =3D ctx->base.pc_next + 2; - if (decode_insn16(ctx, opcode)) { - return; - } + ctx->opcode =3D opcode; + ctx->pc_succ_insn =3D ctx->base.pc_next + 2; + if (has_ext(ctx, RVC) && decode_insn16(ctx, opcode)) { + return; } } else { uint32_t opcode32 =3D opcode; diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target index 75257f2b29..14bc013181 100644 --- a/tests/tcg/Makefile.target +++ b/tests/tcg/Makefile.target @@ -117,6 +117,8 @@ endif =20 %: %.c $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) +%: %.S + $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) else # For softmmu targets we include a different Makefile fragement as the # build options for bare programs are usually pretty different. They diff --git a/tests/tcg/riscv64/Makefile.target b/tests/tcg/riscv64/Makefi= le.target index b5b89dfb0e..cc3ed65ffd 100644 --- a/tests/tcg/riscv64/Makefile.target +++ b/tests/tcg/riscv64/Makefile.target @@ -4,3 +4,9 @@ VPATH +=3D $(SRC_PATH)/tests/tcg/riscv64 TESTS +=3D test-div TESTS +=3D noexec + +# Disable compressed instructions for test-noc +TESTS +=3D test-noc +test-noc: LDFLAGS =3D -nostdlib -static +run-test-noc: QEMU_OPTS +=3D -cpu rv64,c=3Dfalse +run-plugin-test-noc-%: QEMU_OPTS +=3D -cpu rv64,c=3Dfalse diff --git a/tests/tcg/riscv64/test-noc.S b/tests/tcg/riscv64/test-noc.S new file mode 100644 index 0000000000..e29d60c8b3 --- /dev/null +++ b/tests/tcg/riscv64/test-noc.S @@ -0,0 +1,32 @@ +#include + + .text + .globl _start +_start: + .option norvc + li a0, 4 /* SIGILL */ + la a1, sa + li a2, 0 + li a3, 8 + li a7, __NR_rt_sigaction + scall + + .option rvc + li a0, 1 + j exit + .option norvc + +pass: + li a0, 0 +exit: + li a7, __NR_exit + scall + + .data + /* struct kernel_sigaction sa =3D { .sa_handler =3D pass }; */ + .type sa, @object + .size sa, 32 +sa: + .dword pass + .zero 24 + --=20 2.39.0