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From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "John G Johnson" <john.g.johnson@oracle.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Elena Ufimtseva" <elena.ufimtseva@oracle.com>,
	"Ani Sinha" <ani@anisinha.ca>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Gerd Hoffmann" <kraxel@redhat.com>,
	"Jagannathan Raman" <jag.raman@oracle.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"John Snow" <jsnow@redhat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	qemu-ppc@nongnu.org, "Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	qemu-block@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	qemu-arm@nongnu.org, "Hervé Poussineau" <hpoussin@reactos.org>,
	"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v6 25/33] hw/isa/piix4: Use TYPE_ISA_PIC device
Date: Mon,  9 Jan 2023 18:23:38 +0100	[thread overview]
Message-ID: <20230109172347.1830-26-shentey@gmail.com> (raw)
In-Reply-To: <20230109172347.1830-1-shentey@gmail.com>

Aligns the code with PIIX3 such that PIIXState can be used in PIIX4,
too.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221022150508.26830-33-shentey@gmail.com>
---
 hw/isa/piix4.c  | 28 ++++++++++------------------
 hw/mips/malta.c | 11 +++++++++--
 hw/mips/Kconfig |  1 +
 3 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 9edaa5de3e..eae4db0182 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -44,9 +44,8 @@
 
 struct PIIX4State {
     PCIDevice dev;
-    qemu_irq cpu_intr;
-    qemu_irq *isa;
 
+    ISAPICState pic;
     RTCState rtc;
     PCIIDEState ide;
     UHCIState uhci;
@@ -82,7 +81,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level)
                 pic_level |= pci_bus_get_irq_level(bus, i);
             }
         }
-        qemu_set_irq(s->isa[pic_irq], pic_level);
+        qemu_set_irq(s->pic.in_irqs[pic_irq], pic_level);
     }
 }
 
@@ -149,12 +148,6 @@ static const VMStateDescription vmstate_piix4 = {
     }
 };
 
-static void piix4_request_i8259_irq(void *opaque, int irq, int level)
-{
-    PIIX4State *s = opaque;
-    qemu_set_irq(s->cpu_intr, level);
-}
-
 static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
                             unsigned int len)
 {
@@ -190,7 +183,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
     PIIX4State *s = PIIX4_PCI_DEVICE(dev);
     PCIBus *pci_bus = pci_get_bus(dev);
     ISABus *isa_bus;
-    qemu_irq *i8259_out_irq;
 
     isa_bus = isa_bus_new(DEVICE(dev), pci_address_space(dev),
                           pci_address_space_io(dev), errp);
@@ -198,20 +190,18 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
         return;
     }
 
-    qdev_init_gpio_out_named(DEVICE(dev), &s->cpu_intr,
-                             "intr", 1);
-
     memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s,
                           "reset-control", 1);
     memory_region_add_subregion_overlap(pci_address_space_io(dev),
                                         PIIX_RCR_IOPORT, &s->rcr_mem, 1);
 
     /* initialize i8259 pic */
-    i8259_out_irq = qemu_allocate_irqs(piix4_request_i8259_irq, s, 1);
-    s->isa = i8259_init(isa_bus, *i8259_out_irq);
+    if (!qdev_realize(DEVICE(&s->pic), NULL, errp)) {
+        return;
+    }
 
     /* initialize ISA irqs */
-    isa_bus_irqs(isa_bus, s->isa);
+    isa_bus_irqs(isa_bus, s->pic.in_irqs);
 
     /* initialize pit */
     i8254_pit_init(isa_bus, 0x40, 0, NULL);
@@ -224,7 +214,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
     if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) {
         return;
     }
-    s->rtc.irq = isa_get_irq(ISA_DEVICE(&s->rtc), s->rtc.isairq);
+    s->rtc.irq = qdev_get_gpio_in(DEVICE(&s->pic), s->rtc.isairq);
 
     /* IDE */
     qdev_prop_set_int32(DEVICE(&s->ide), "addr", dev->devfn + 1);
@@ -251,7 +241,8 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
         if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) {
             return;
         }
-        qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa[9]);
+        qdev_connect_gpio_out(DEVICE(&s->pm), 0,
+                              qdev_get_gpio_in(DEVICE(&s->pic), 9));
     }
 
     pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS);
@@ -261,6 +252,7 @@ static void piix4_init(Object *obj)
 {
     PIIX4State *s = PIIX4_PCI_DEVICE(obj);
 
+    object_initialize_child(obj, "pic", &s->pic, TYPE_ISA_PIC);
     object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC);
     object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE);
 }
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 4a2e0edd98..55f3e0c54a 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -29,6 +29,7 @@
 #include "qemu/guest-random.h"
 #include "hw/clock.h"
 #include "hw/southbridge/piix.h"
+#include "hw/intc/i8259.h"
 #include "hw/isa/superio.h"
 #include "hw/char/serial.h"
 #include "net/net.h"
@@ -1280,10 +1281,11 @@ void mips_malta_init(MachineState *machine)
     PCIBus *pci_bus;
     ISABus *isa_bus;
     qemu_irq cbus_irq, i8259_irq;
+    qemu_irq *i8259;
     I2CBus *smbus;
     DriveInfo *dinfo;
     int fl_idx = 0;
-    int be;
+    int be, i;
     MaltaState *s;
     PCIDevice *piix4;
     DeviceState *dev;
@@ -1459,7 +1461,12 @@ void mips_malta_init(MachineState *machine)
     pci_ide_create_devs(PCI_DEVICE(dev));
 
     /* Interrupt controller */
-    qdev_connect_gpio_out_named(DEVICE(piix4), "intr", 0, i8259_irq);
+    dev = DEVICE(object_resolve_path_component(OBJECT(piix4), "pic"));
+    i8259 = i8259_init(isa_bus, i8259_irq);
+    for (i = 0; i < ISA_NUM_IRQS; i++) {
+        qdev_connect_gpio_out(dev, i, i8259[i]);
+    }
+    g_free(i8259);
 
     /* generate SPD EEPROM data */
     dev = DEVICE(object_resolve_path_component(OBJECT(piix4), "pm"));
diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
index 4e7042f03d..d156de812c 100644
--- a/hw/mips/Kconfig
+++ b/hw/mips/Kconfig
@@ -1,5 +1,6 @@
 config MALTA
     bool
+    select I8259
     select ISA_SUPERIO
     select PIIX4
 
-- 
2.39.0



  parent reply	other threads:[~2023-01-09 17:30 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-09 17:23 [PATCH v6 00/33] Consolidate PIIX south bridges Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 01/33] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 02/33] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 03/33] hw/isa/piix4: Correct IRQRC[A:D] reset values Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 04/33] hw/pci/pci: Factor out pci_bus_map_irqs() from pci_bus_irqs() Bernhard Beschow
2023-01-13 10:13   ` Philippe Mathieu-Daudé
2023-01-13 17:37     ` Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 05/33] hw/isa/piix3: Decouple INTx-to-LNKx routing which is board-specific Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 06/33] hw/isa/piix4: " Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 07/33] hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 08/33] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 09/33] hw/intc/i8259: Make using the isa_pic singleton more type-safe Bernhard Beschow
2023-01-12 12:40   ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 10/33] hw/intc/i8259: Introduce i8259 proxy TYPE_ISA_PIC Bernhard Beschow
2023-01-12 12:40   ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 11/33] hw/i386/pc: Create RTC controllers in south bridges Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 12/33] hw/i386/pc: No need for rtc_state to be an out-parameter Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 13/33] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2023-01-12 12:43   ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 14/33] hw/isa/piix3: Create USB controller in host device Bernhard Beschow
2023-01-12 12:45   ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 15/33] hw/isa/piix3: Create power management " Bernhard Beschow
2023-01-12 12:46   ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 16/33] hw/isa/piix3: Create TYPE_ISA_PIC " Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 17/33] hw/isa/piix3: Create IDE controller " Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 18/33] hw/isa/piix3: Wire up ACPI interrupt internally Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 19/33] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 20/33] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 21/33] hw/isa/piix3: Rename piix3_reset() " Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 22/33] hw/isa/piix3: Drop the "3" from PIIX base class Bernhard Beschow
2023-01-12 12:48   ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 23/33] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 24/33] hw/isa/piix4: Remove unused inbound ISA interrupt lines Bernhard Beschow
2023-01-09 17:23 ` Bernhard Beschow [this message]
2023-01-11 17:08   ` [PATCH v6 25/33] hw/isa/piix4: Use TYPE_ISA_PIC device Philippe Mathieu-Daudé
2023-01-11 22:47     ` Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 26/33] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 27/33] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 28/33] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2023-01-12 12:50   ` Philippe Mathieu-Daudé
2023-01-12 13:32     ` Philippe Mathieu-Daudé
2023-01-12 18:24       ` Bernhard Beschow
2023-01-12 15:04   ` Philippe Mathieu-Daudé
2023-01-12 16:31     ` Philippe Mathieu-Daudé
2023-01-12 18:03       ` Bernhard Beschow
2023-01-12 16:36   ` Philippe Mathieu-Daudé
2023-01-12 18:21     ` Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 29/33] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 30/33] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Bernhard Beschow
2023-01-12 12:51   ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 31/33] hw/isa/piix: Rename functions to be shared for interrupt triggering Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 32/33] hw/isa/piix: Consolidate IRQ triggering Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 33/33] hw/isa/piix: Share PIIX3's base class with PIIX4 Bernhard Beschow
2023-01-13  8:46 ` [PATCH v6 00/33] Consolidate PIIX south bridges Philippe Mathieu-Daudé
2023-01-13 17:39   ` Bernhard Beschow
2023-01-20 12:22     ` Bernhard Beschow
2023-01-23  9:25       ` Philippe Mathieu-Daudé
2023-01-23 15:51         ` Bernhard Beschow
2023-02-10 16:27           ` Bernhard Beschow
2023-02-10 17:11             ` Philippe Mathieu-Daudé
2023-02-11 16:23               ` Bernhard Beschow
2023-02-12 12:51                 ` Bernhard Beschow

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