From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "John G Johnson" <john.g.johnson@oracle.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Igor Mammedov" <imammedo@redhat.com>,
"Elena Ufimtseva" <elena.ufimtseva@oracle.com>,
"Ani Sinha" <ani@anisinha.ca>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Jagannathan Raman" <jag.raman@oracle.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"John Snow" <jsnow@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
qemu-ppc@nongnu.org, "Jiaxun Yang" <jiaxun.yang@flygoat.com>,
qemu-block@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
qemu-arm@nongnu.org, "Hervé Poussineau" <hpoussin@reactos.org>,
"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v6 04/33] hw/pci/pci: Factor out pci_bus_map_irqs() from pci_bus_irqs()
Date: Mon, 9 Jan 2023 18:23:17 +0100 [thread overview]
Message-ID: <20230109172347.1830-5-shentey@gmail.com> (raw)
In-Reply-To: <20230109172347.1830-1-shentey@gmail.com>
pci_bus_irqs() coupled together the assignment of pci_set_irq_fn and
pci_map_irq_fn to a PCI bus. This coupling gets in the way when the
pci_map_irq_fn is board-specific while the pci_set_irq_fn is device-
specific.
For example, both of QEMU's PIIX south bridge models have different
pci_map_irq_fn implementations which are board-specific rather than
device-specific. These implementations should therefore reside in board
code. The pci_set_irq_fn's, however, should stay in the device models
because they access memory internal to the model.
Factoring out pci_bus_map_irqs() from pci_bus_irqs() allows the
assignments to be decoupled, resolving the problem described above.
Note also how pci_vpb_realize() which gets touched in this commit
assigns different pci_map_irq_fn's depending on the board.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/pci/pci.h | 3 ++-
hw/i386/pc_q35.c | 4 ++--
hw/isa/piix3.c | 8 ++++----
hw/isa/piix4.c | 3 ++-
hw/pci-host/raven.c | 3 ++-
hw/pci-host/versatile.c | 3 ++-
hw/pci/pci.c | 12 +++++++++---
hw/remote/machine.c | 3 ++-
8 files changed, 25 insertions(+), 14 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 7048a373d1..85ee458cd2 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -282,8 +282,9 @@ PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
MemoryRegion *address_space_io,
uint8_t devfn_min, const char *typename);
void pci_root_bus_cleanup(PCIBus *bus);
-void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
+void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq,
void *irq_opaque, int nirq);
+void pci_bus_map_irqs(PCIBus *bus, pci_map_irq_fn map_irq);
void pci_bus_irqs_cleanup(PCIBus *bus);
int pci_bus_get_irq_level(PCIBus *bus, int irq_num);
/* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 67ceb04bcc..65ea226211 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -268,8 +268,8 @@ static void pc_q35_init(MachineState *machine)
for (i = 0; i < GSI_NUM_PINS; i++) {
qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
}
- pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
- ICH9_LPC_NB_PIRQS);
+ pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc, ICH9_LPC_NB_PIRQS);
+ pci_bus_map_irqs(host_bus, ich9_lpc_map_irq);
pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
isa_bus = ich9_lpc->isa_bus;
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index eabad7ba58..666e794f77 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -384,8 +384,8 @@ static void piix3_realize(PCIDevice *dev, Error **errp)
return;
}
- pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq,
- piix3, PIIX_NUM_PIRQS);
+ pci_bus_irqs(pci_bus, piix3_set_irq, piix3, PIIX_NUM_PIRQS);
+ pci_bus_map_irqs(pci_bus, pci_slot_get_pirq);
pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq);
}
@@ -420,8 +420,8 @@ static void piix3_xen_realize(PCIDevice *dev, Error **errp)
* connected to the IOAPIC directly.
* These additional routes can be discovered through ACPI.
*/
- pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq,
- piix3, XEN_PIIX_NUM_PIRQS);
+ pci_bus_irqs(pci_bus, xen_piix3_set_irq, piix3, XEN_PIIX_NUM_PIRQS);
+ pci_bus_map_irqs(pci_bus, xen_pci_slot_get_pirq);
}
static void piix3_xen_class_init(ObjectClass *klass, void *data)
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 0d23e11a39..9c79c9677b 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -271,7 +271,8 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
}
qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa[9]);
- pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, PIIX_NUM_PIRQS);
+ pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS);
+ pci_bus_map_irqs(pci_bus, pci_slot_get_pirq);
}
static void piix4_init(Object *obj)
diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c
index 2c96ddf8fe..5b00b4e462 100644
--- a/hw/pci-host/raven.c
+++ b/hw/pci-host/raven.c
@@ -258,7 +258,8 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp)
qdev_init_gpio_in(d, raven_change_gpio, 1);
- pci_bus_irqs(&s->pci_bus, raven_set_irq, raven_map_irq, s, PCI_NUM_PINS);
+ pci_bus_irqs(&s->pci_bus, raven_set_irq, s, PCI_NUM_PINS);
+ pci_bus_map_irqs(&s->pci_bus, raven_map_irq);
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, s,
"pci-conf-idx", 4);
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index 0d50ea4cc0..60d4e7cd92 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -422,7 +422,8 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
mapfn = pci_vpb_map_irq;
}
- pci_bus_irqs(&s->pci_bus, pci_vpb_set_irq, mapfn, s->irq, 4);
+ pci_bus_irqs(&s->pci_bus, pci_vpb_set_irq, s->irq, 4);
+ pci_bus_map_irqs(&s->pci_bus, mapfn);
/* Our memory regions are:
* 0 : our control registers
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index c2fb88f9a3..39a7bb32aa 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -280,6 +280,7 @@ static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change)
PCIBus *bus;
for (;;) {
bus = pci_get_bus(pci_dev);
+ assert(bus->map_irq);
irq_num = bus->map_irq(pci_dev, irq_num);
if (bus->set_irq)
break;
@@ -518,16 +519,20 @@ void pci_root_bus_cleanup(PCIBus *bus)
qbus_unrealize(BUS(bus));
}
-void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
+void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq,
void *irq_opaque, int nirq)
{
bus->set_irq = set_irq;
- bus->map_irq = map_irq;
bus->irq_opaque = irq_opaque;
bus->nirq = nirq;
bus->irq_count = g_malloc0(nirq * sizeof(bus->irq_count[0]));
}
+void pci_bus_map_irqs(PCIBus *bus, pci_map_irq_fn map_irq)
+{
+ bus->map_irq = map_irq;
+}
+
void pci_bus_irqs_cleanup(PCIBus *bus)
{
bus->set_irq = NULL;
@@ -549,7 +554,8 @@ PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
bus = pci_root_bus_new(parent, name, address_space_mem,
address_space_io, devfn_min, typename);
- pci_bus_irqs(bus, set_irq, map_irq, irq_opaque, nirq);
+ pci_bus_irqs(bus, set_irq, irq_opaque, nirq);
+ pci_bus_map_irqs(bus, map_irq);
return bus;
}
diff --git a/hw/remote/machine.c b/hw/remote/machine.c
index 75d550daae..519f855ec1 100644
--- a/hw/remote/machine.c
+++ b/hw/remote/machine.c
@@ -63,8 +63,9 @@ static void remote_machine_init(MachineState *machine)
} else {
remote_iohub_init(&s->iohub);
- pci_bus_irqs(pci_host->bus, remote_iohub_set_irq, remote_iohub_map_irq,
+ pci_bus_irqs(pci_host->bus, remote_iohub_set_irq,
&s->iohub, REMOTE_IOHUB_NB_PIRQS);
+ pci_bus_map_irqs(pci_host->bus, remote_iohub_map_irq);
}
qbus_set_hotplug_handler(BUS(pci_host->bus), OBJECT(s));
--
2.39.0
next prev parent reply other threads:[~2023-01-09 17:47 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-09 17:23 [PATCH v6 00/33] Consolidate PIIX south bridges Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 01/33] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 02/33] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 03/33] hw/isa/piix4: Correct IRQRC[A:D] reset values Bernhard Beschow
2023-01-09 17:23 ` Bernhard Beschow [this message]
2023-01-13 10:13 ` [PATCH v6 04/33] hw/pci/pci: Factor out pci_bus_map_irqs() from pci_bus_irqs() Philippe Mathieu-Daudé
2023-01-13 17:37 ` Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 05/33] hw/isa/piix3: Decouple INTx-to-LNKx routing which is board-specific Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 06/33] hw/isa/piix4: " Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 07/33] hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 08/33] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 09/33] hw/intc/i8259: Make using the isa_pic singleton more type-safe Bernhard Beschow
2023-01-12 12:40 ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 10/33] hw/intc/i8259: Introduce i8259 proxy TYPE_ISA_PIC Bernhard Beschow
2023-01-12 12:40 ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 11/33] hw/i386/pc: Create RTC controllers in south bridges Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 12/33] hw/i386/pc: No need for rtc_state to be an out-parameter Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 13/33] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2023-01-12 12:43 ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 14/33] hw/isa/piix3: Create USB controller in host device Bernhard Beschow
2023-01-12 12:45 ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 15/33] hw/isa/piix3: Create power management " Bernhard Beschow
2023-01-12 12:46 ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 16/33] hw/isa/piix3: Create TYPE_ISA_PIC " Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 17/33] hw/isa/piix3: Create IDE controller " Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 18/33] hw/isa/piix3: Wire up ACPI interrupt internally Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 19/33] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 20/33] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 21/33] hw/isa/piix3: Rename piix3_reset() " Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 22/33] hw/isa/piix3: Drop the "3" from PIIX base class Bernhard Beschow
2023-01-12 12:48 ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 23/33] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 24/33] hw/isa/piix4: Remove unused inbound ISA interrupt lines Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 25/33] hw/isa/piix4: Use TYPE_ISA_PIC device Bernhard Beschow
2023-01-11 17:08 ` Philippe Mathieu-Daudé
2023-01-11 22:47 ` Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 26/33] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 27/33] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 28/33] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2023-01-12 12:50 ` Philippe Mathieu-Daudé
2023-01-12 13:32 ` Philippe Mathieu-Daudé
2023-01-12 18:24 ` Bernhard Beschow
2023-01-12 15:04 ` Philippe Mathieu-Daudé
2023-01-12 16:31 ` Philippe Mathieu-Daudé
2023-01-12 18:03 ` Bernhard Beschow
2023-01-12 16:36 ` Philippe Mathieu-Daudé
2023-01-12 18:21 ` Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 29/33] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 30/33] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Bernhard Beschow
2023-01-12 12:51 ` Philippe Mathieu-Daudé
2023-01-09 17:23 ` [PATCH v6 31/33] hw/isa/piix: Rename functions to be shared for interrupt triggering Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 32/33] hw/isa/piix: Consolidate IRQ triggering Bernhard Beschow
2023-01-09 17:23 ` [PATCH v6 33/33] hw/isa/piix: Share PIIX3's base class with PIIX4 Bernhard Beschow
2023-01-13 8:46 ` [PATCH v6 00/33] Consolidate PIIX south bridges Philippe Mathieu-Daudé
2023-01-13 17:39 ` Bernhard Beschow
2023-01-20 12:22 ` Bernhard Beschow
2023-01-23 9:25 ` Philippe Mathieu-Daudé
2023-01-23 15:51 ` Bernhard Beschow
2023-02-10 16:27 ` Bernhard Beschow
2023-02-10 17:11 ` Philippe Mathieu-Daudé
2023-02-11 16:23 ` Bernhard Beschow
2023-02-12 12:51 ` Bernhard Beschow
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