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Fri, 13 Jan 2023 08:51:21 -0800 (PST) Received: from redhat.com ([38.15.36.239]) by smtp.gmail.com with ESMTPSA id n31-20020a056602341f00b006884b050a0asm7143384ioz.18.2023.01.13.08.51.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Jan 2023 08:51:20 -0800 (PST) Date: Fri, 13 Jan 2023 09:51:17 -0700 From: Alex Williamson To: David Woodhouse Cc: Jason Wang , mst@redhat.com, Peter Xu , yi.l.liu@intel.com, yi.y.sun@linux.intel.com, qemu-devel Subject: Re: Qemu interrupt-remap fault support Message-ID: <20230113095117.1d48c9c2.alex.williamson@redhat.com> In-Reply-To: References: Organization: Red Hat MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=alex.williamson@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, 13 Jan 2023 09:08:38 +0000 David Woodhouse wrote: > I'm looking at interrupt remapping (because I need to hook into the > translation somehow to add PIRQ support for Xen which translates guest > MSIs directly to KVM_IRQ_ROUTING_XEN_EVTCHN). > > Am I right in understanding that it doesn't report faults on interrupts > which can't be translated? It attempts to translate interrupts at the > time the table is modified (vtd_int_remap()) or when an APIC access > actually triggers an MSI (vtd_mem_ir_write()) but in neither case does > it actually raise a fault? AIUI, yes. > The behaviour we want here is that we only raise a fault when the IRQ > actually *happens*. But that's hard in our current model where it looks > like we pretranslate *everything* in advance and just let it run. > > Here's a proposal for a model which could make it work (using VFIO as > the example since that's the more complex part but it works for > emulated MSI sources too): > > We consume the VFIO eventfd *both* in userspace and the kernel. (Since > https://lore.kernel.org/kvm/20201027143944.648769-1-dwmw2@infradead.org/ > we can just keep listening on the VFIO eventfd in userspace and the > kernel will eat all the events so you never notice. On older kernels we > have to manually stop listening in userspace.) How do we determine if we're on a new/old kernel for this? > When a translation is valid and should be considered 'cached' in the > IOMMU, that's when we actually hook it up to the irqfd. > > We can ditch the iec invalidate callbacks (vtd_iec_notify_all) because > all an invalidation needs to do is KVM_IRQFD_FLAG_DEASSIGN for the > corresponding GSI. > > ( > You might consider abusing a spare field in the KVM routing table to > hold a cookie like the IRTE# so that you know *which* entries to > invalidate. I couldn't possibly comment. > > /* 64-bit cookie for IOMMU to use for invalidation choices */ > #define ire_ir_cookie(ire) ((ire)->u.adapter.ind_offset) > > /* Flags, to indicate a stale entry that needs retranslating > */ > #define ire_user_flags(ire) ((ire)->u.adapter.summary_offset) > #define IRE_USER_FLAG_STALE 1 > ) > > So when an interrupt happens and it's *untranslated*, that's when it > gets raised to userspace to handle, e.g. in vfio_msi_interrupt(). That > does the normal thing and attempts to deliver the guest MSI directly. > We add a flag "bool delivering_now" to the X86IOMMUClass int_remap > function, to allow it to distinguish between preemptive translations > and actual delivery and to raise the fault in the latter case. > > When the guest frobs a device's MSI table we can do the translation as > we do at the moment, of course with the 'delivering_now' argument being > false. And *if* the translation succeeds then we can install the IRQFD > right away. > > This model allows us to generate faults as the hardware would, and also > improves the efficiency of invalidation by only invalidating what we > need to. I haven't looked hard at how it works with an emulated AMD > IOMMU, but I know that the Xen PIRQ support (which is where I came in) > slots into it fairly trivially, using the PIRQ# as the 'cookie' for > invalidation instead of the IRTE# that the Intel IOMMU uses. Seems ok, but it hinges on being able to detect whether kvm consumes the eventfd or not since and un-consumed eventfd would then look the same as an invalid translation. Thanks, Alex