From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PULL 19/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (2/5)
Date: Fri, 13 Jan 2023 16:45:05 +0100 [thread overview]
Message-ID: <20230113154532.49979-20-philmd@linaro.org> (raw)
In-Reply-To: <20230113154532.49979-1-philmd@linaro.org>
Part 2/5: Convert PCI0 MEM0 BAR setup
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221211204533.85359-8-philmd@linaro.org>
---
hw/mips/malta.c | 35 ++++++-----------------------------
1 file changed, 6 insertions(+), 29 deletions(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index a496053a9a..7d0fc5d0c8 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -693,7 +693,6 @@ static void write_bootloader_nanomips(uint8_t *base, uint64_t run_addr,
* Load BAR registers as done by YAMON:
*
* - set up PCI0 I/O BARs from 0x18000000 to 0x181fffff
- * - set up PCI0 MEM0 at 0x10000000, size 0x8000000
*
*/
stw_p(p++, 0xe040); stw_p(p++, 0x0681);
@@ -729,20 +728,6 @@ static void write_bootloader_nanomips(uint8_t *base, uint64_t run_addr,
stw_p(p++, 0xe020); stw_p(p++, 0x0001);
/* lui t0, %hi(0x80000000) */
- /* 0x58 corresponds to GT_PCI0M0LD */
- stw_p(p++, 0x8422); stw_p(p++, 0x9058);
- /* sw t0, 0x58(t1) */
-
- stw_p(p++, 0xe020); stw_p(p++, 0x07e0);
- /* lui t0, %hi(0x3f000000) */
-
- /* 0x60 corresponds to GT_PCI0M0HD */
- stw_p(p++, 0x8422); stw_p(p++, 0x9060);
- /* sw t0, 0x60(t1) */
-
- stw_p(p++, 0xe020); stw_p(p++, 0x0821);
- /* lui t0, %hi(0xc1000000) */
-
#else
#define cpu_to_gt32 cpu_to_be32
@@ -773,24 +758,16 @@ static void write_bootloader_nanomips(uint8_t *base, uint64_t run_addr,
stw_p(p++, 0x0020); stw_p(p++, 0x0080);
/* addiu[32] t0, $0, 0x80 */
-
- /* 0x58 corresponds to GT_PCI0M0LD */
- stw_p(p++, 0x8422); stw_p(p++, 0x9058);
- /* sw t0, 0x58(t1) */
-
- stw_p(p++, 0x0020); stw_p(p++, 0x003f);
- /* addiu[32] t0, $0, 0x3f */
-
- /* 0x60 corresponds to GT_PCI0M0HD */
- stw_p(p++, 0x8422); stw_p(p++, 0x9060);
- /* sw t0, 0x60(t1) */
-
- stw_p(p++, 0x0020); stw_p(p++, 0x00c1);
- /* addiu[32] t0, $0, 0xc1 */
#endif
v = p;
/* setup PCI0 mem windows */
+ bl_gen_write_u32(&v, /* GT_PCI0M0LD */
+ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x58),
+ cpu_to_gt32(0x10000000 << 3));
+ bl_gen_write_u32(&v, /* GT_PCI0M0HD */
+ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x60),
+ cpu_to_gt32(0x07e00000 << 3));
bl_gen_write_u32(&v, /* GT_PCI0M1LD */
cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x80),
cpu_to_gt32(0x18200000 << 3));
--
2.38.1
next prev parent reply other threads:[~2023-01-13 17:22 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-13 15:44 [PULL 00/46] MIPS patches for 2023-01-13 Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 01/46] hw/mips/malta: Split FPGA LEDs/ASCII display updates Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 02/46] hw/mips/malta: Trace " Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 03/46] hw/mips/gt64xxx_pci: Accumulate address space changes Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 04/46] hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 05/46] hw/mips/Kconfig: Introduce CONFIG_GT64120 to select gt64xxx_pci.c Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 06/46] hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 07/46] hw/mips/gt64xxx_pci: Manage endian bits with the RegisterFields API Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 08/46] hw/mips/gt64xxx_pci: Add a 'cpu-little-endian' qdev property Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 09/46] hw/mips/malta: Explicit GT64120 endianness upon device creation Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 10/46] hw/mips/meson: Make gt64xxx_pci.c endian-agnostic Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 11/46] hw/mips/gt64xxx_pci: Move it to hw/pci-host/ Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 12/46] tests/avocado: Add tests booting YAMON ROM on MIPS Malta machines Philippe Mathieu-Daudé
2023-01-13 15:44 ` [PULL 13/46] hw/mips/bootloader: Handle buffers as opaque arrays Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 14/46] hw/mips/bootloader: Implement nanoMIPS NOP opcode generator Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 15/46] hw/mips/bootloader: Implement nanoMIPS SW " Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 16/46] hw/mips/bootloader: Implement nanoMIPS LI (LUI+ORI) " Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 17/46] hw/mips/bootloader: Implement nanoMIPS JALRc " Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 18/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (1/5) Philippe Mathieu-Daudé
2023-01-13 15:45 ` Philippe Mathieu-Daudé [this message]
2023-01-13 15:45 ` [PULL 20/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (3/5) Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 21/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (4/5) Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 22/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (5/5) Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 23/46] hw/mips/malta: Merge common BL code as bl_setup_gt64120_jump_kernel() Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 24/46] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 25/46] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 26/46] hw/isa/piix4: Correct IRQRC[A:D] reset values Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 27/46] mips: Remove support for trap and emulate KVM Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 28/46] mips: Always include nanomips disassembler Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 29/46] hw/pci/pci_host: Trace config accesses on unexisting functions Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 30/46] hw/pci/pci: Factor out pci_bus_map_irqs() from pci_bus_irqs() Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 31/46] hw/isa/piix3: Decouple INTx-to-LNKx routing which is board-specific Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 32/46] hw/isa/piix4: " Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 33/46] hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 34/46] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 35/46] hw/intc/i8259: Make using the isa_pic singleton more type-safe Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 36/46] hw/intc: Extract the IRQ counting functions into a separate file Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 37/46] hw/core/qdev-properties-system: Allow the 'slew' policy only on x86 Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 38/46] hw/rtc/mc146818rtc: Make the mc146818 RTC device target independent Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 39/46] softmmu/rtc: Emit warning when using driftfix=slew on systems without mc146818 Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 40/46] hw/pci-host/bonito: Convert to 3-phase reset Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 41/46] hw/pci-host/bonito: Use 'bonito_host' for PCI host bridge code Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 42/46] hw/pci-host/bonito: Use 'bonito_pci' for PCI function #0 code Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 43/46] hw/pci-host/bonito: Declare TYPE_BONITO_PCI_HOST_BRIDGE in header Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 44/46] hw/mips/boston: Rename MachineState 'mc' pointer to 'ms' Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 45/46] target/mips: Restrict 'qapi-commands-machine.h' to system emulation Philippe Mathieu-Daudé
2023-01-13 15:45 ` [PULL 46/46] scripts/git.orderfile: Display MAINTAINERS changes first Philippe Mathieu-Daudé
2023-01-13 17:57 ` [PULL 00/46] MIPS patches for 2023-01-13 Peter Maydell
2023-01-13 20:31 ` Philippe Mathieu-Daudé
2023-01-16 15:00 ` Peter Maydell
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