* [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types
@ 2023-01-13 20:01 Philippe Mathieu-Daudé
2023-01-13 20:01 ` [PATCH 1/4] iothread: Remove unused IOThreadClass / IOTHREAD_CLASS Philippe Mathieu-Daudé
` (5 more replies)
0 siblings, 6 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-13 20:01 UTC (permalink / raw)
To: qemu-devel
Cc: Stefan Hajnoczi, qemu-arm, Peter Maydell, qemu-ppc,
Edgar E. Iglesias, qemu-trivial, Alistair Francis,
Philippe Mathieu-Daudé
- remove unused code
- use recent QOM macros
- use CamelCase typedef
Philippe Mathieu-Daudé (4):
iothread: Remove unused IOThreadClass / IOTHREAD_CLASS
hw/irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
hw/or-irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
hw: Replace qemu_or_irq typedef by OrIRQState
hw/arm/exynos4210.c | 4 ++--
hw/arm/mps2-tz.c | 2 +-
hw/core/irq.c | 9 ++++-----
hw/core/or-irq.c | 18 +++++++++---------
hw/pci-host/raven.c | 2 +-
include/hw/arm/armsse.h | 6 +++---
include/hw/arm/bcm2835_peripherals.h | 2 +-
include/hw/arm/exynos4210.h | 4 ++--
include/hw/arm/stm32f205_soc.h | 2 +-
include/hw/arm/stm32f405_soc.h | 2 +-
include/hw/arm/xlnx-versal.h | 6 +++---
include/hw/arm/xlnx-zynqmp.h | 2 +-
include/hw/or-irq.h | 5 +----
iothread.c | 4 ----
14 files changed, 30 insertions(+), 38 deletions(-)
--
2.38.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/4] iothread: Remove unused IOThreadClass / IOTHREAD_CLASS
2023-01-13 20:01 [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types Philippe Mathieu-Daudé
@ 2023-01-13 20:01 ` Philippe Mathieu-Daudé
2023-01-16 2:45 ` Alistair Francis
2023-01-13 20:01 ` [PATCH 2/4] hw/irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE() Philippe Mathieu-Daudé
` (4 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-13 20:01 UTC (permalink / raw)
To: qemu-devel
Cc: Stefan Hajnoczi, qemu-arm, Peter Maydell, qemu-ppc,
Edgar E. Iglesias, qemu-trivial, Alistair Francis,
Philippe Mathieu-Daudé
Since commit be8d853766 ("iothread: add I/O thread object") we
never used IOThreadClass / IOTHREAD_CLASS() / IOTHREAD_GET_CLASS(),
remove these definitions.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
iothread.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/iothread.c b/iothread.c
index 3862a64471..b41c305bd9 100644
--- a/iothread.c
+++ b/iothread.c
@@ -25,10 +25,6 @@
#include "qemu/rcu.h"
#include "qemu/main-loop.h"
-typedef ObjectClass IOThreadClass;
-
-DECLARE_CLASS_CHECKERS(IOThreadClass, IOTHREAD,
- TYPE_IOTHREAD)
#ifdef CONFIG_POSIX
/* Benchmark results from 2016 on NVMe SSD drives show max polling times around
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/4] hw/irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
2023-01-13 20:01 [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types Philippe Mathieu-Daudé
2023-01-13 20:01 ` [PATCH 1/4] iothread: Remove unused IOThreadClass / IOTHREAD_CLASS Philippe Mathieu-Daudé
@ 2023-01-13 20:01 ` Philippe Mathieu-Daudé
2023-01-16 2:46 ` Alistair Francis
2023-01-13 20:01 ` [PATCH 3/4] hw/or-irq: " Philippe Mathieu-Daudé
` (3 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-13 20:01 UTC (permalink / raw)
To: qemu-devel
Cc: Stefan Hajnoczi, qemu-arm, Peter Maydell, qemu-ppc,
Edgar E. Iglesias, qemu-trivial, Alistair Francis,
Philippe Mathieu-Daudé
QOM *DECLARE* macros expect a typedef as first argument,
not a structure. Replace 'struct IRQState' by 'IRQState'
to avoid when modifying the macros:
../hw/core/irq.c:29:1: error: declaration of anonymous struct must be a definition
DECLARE_INSTANCE_CHECKER(struct IRQState, IRQ,
^
Use OBJECT_DECLARE_SIMPLE_TYPE instead of DECLARE_INSTANCE_CHECKER.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/core/irq.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/hw/core/irq.c b/hw/core/irq.c
index 3623f711fe..3f14e2dda7 100644
--- a/hw/core/irq.c
+++ b/hw/core/irq.c
@@ -26,8 +26,7 @@
#include "hw/irq.h"
#include "qom/object.h"
-DECLARE_INSTANCE_CHECKER(struct IRQState, IRQ,
- TYPE_IRQ)
+OBJECT_DECLARE_SIMPLE_TYPE(IRQState, IRQ)
struct IRQState {
Object parent_obj;
@@ -68,7 +67,7 @@ qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n)
qemu_irq qemu_allocate_irq(qemu_irq_handler handler, void *opaque, int n)
{
- struct IRQState *irq;
+ IRQState *irq;
irq = IRQ(object_new(TYPE_IRQ));
irq->handler = handler;
@@ -94,7 +93,7 @@ void qemu_free_irq(qemu_irq irq)
static void qemu_notirq(void *opaque, int line, int level)
{
- struct IRQState *irq = opaque;
+ IRQState *irq = opaque;
irq->handler(irq->opaque, irq->n, !level);
}
@@ -120,7 +119,7 @@ void qemu_irq_intercept_in(qemu_irq *gpio_in, qemu_irq_handler handler, int n)
static const TypeInfo irq_type_info = {
.name = TYPE_IRQ,
.parent = TYPE_OBJECT,
- .instance_size = sizeof(struct IRQState),
+ .instance_size = sizeof(IRQState),
};
static void irq_register_types(void)
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/4] hw/or-irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
2023-01-13 20:01 [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types Philippe Mathieu-Daudé
2023-01-13 20:01 ` [PATCH 1/4] iothread: Remove unused IOThreadClass / IOTHREAD_CLASS Philippe Mathieu-Daudé
2023-01-13 20:01 ` [PATCH 2/4] hw/irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE() Philippe Mathieu-Daudé
@ 2023-01-13 20:01 ` Philippe Mathieu-Daudé
2023-01-16 2:47 ` Alistair Francis
2023-01-13 20:01 ` [PATCH 4/4] hw: Replace qemu_or_irq typedef by OrIRQState Philippe Mathieu-Daudé
` (2 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-13 20:01 UTC (permalink / raw)
To: qemu-devel
Cc: Stefan Hajnoczi, qemu-arm, Peter Maydell, qemu-ppc,
Edgar E. Iglesias, qemu-trivial, Alistair Francis,
Philippe Mathieu-Daudé
Missed during automatic conversion from commit 8063396bf3
("Use OBJECT_DECLARE_SIMPLE_TYPE when possible").
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/or-irq.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/hw/or-irq.h b/include/hw/or-irq.h
index f2f0a27381..131abc2e0c 100644
--- a/include/hw/or-irq.h
+++ b/include/hw/or-irq.h
@@ -37,8 +37,7 @@
typedef struct OrIRQState qemu_or_irq;
-DECLARE_INSTANCE_CHECKER(qemu_or_irq, OR_IRQ,
- TYPE_OR_IRQ)
+OBJECT_DECLARE_SIMPLE_TYPE(OrIRQState, OR_IRQ)
struct OrIRQState {
DeviceState parent_obj;
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/4] hw: Replace qemu_or_irq typedef by OrIRQState
2023-01-13 20:01 [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2023-01-13 20:01 ` [PATCH 3/4] hw/or-irq: " Philippe Mathieu-Daudé
@ 2023-01-13 20:01 ` Philippe Mathieu-Daudé
2023-01-16 2:48 ` Alistair Francis
2023-01-17 16:15 ` [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types Stefan Hajnoczi
2023-02-07 9:17 ` Philippe Mathieu-Daudé
5 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-01-13 20:01 UTC (permalink / raw)
To: qemu-devel
Cc: Stefan Hajnoczi, qemu-arm, Peter Maydell, qemu-ppc,
Edgar E. Iglesias, qemu-trivial, Alistair Francis,
Philippe Mathieu-Daudé
OBJECT_DECLARE_SIMPLE_TYPE() macro provides the OrIRQState
declaration for free. Besides, the QOM code style is to use
the structure name as typedef, and QEMU style is to use Camel
Case, so rename qemu_or_irq as OrIRQState.
Mechanical change using:
$ sed -i -e 's/qemu_or_irq/OrIRQState/g' $(git grep -l qemu_or_irq)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/exynos4210.c | 4 ++--
hw/arm/mps2-tz.c | 2 +-
hw/core/or-irq.c | 18 +++++++++---------
hw/pci-host/raven.c | 2 +-
include/hw/arm/armsse.h | 6 +++---
include/hw/arm/bcm2835_peripherals.h | 2 +-
include/hw/arm/exynos4210.h | 4 ++--
include/hw/arm/stm32f205_soc.h | 2 +-
include/hw/arm/stm32f405_soc.h | 2 +-
include/hw/arm/xlnx-versal.h | 6 +++---
include/hw/arm/xlnx-zynqmp.h | 2 +-
include/hw/or-irq.h | 2 --
12 files changed, 25 insertions(+), 27 deletions(-)
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 8dafa2215b..6f2dda13f6 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -507,7 +507,7 @@ static uint64_t exynos4210_calc_affinity(int cpu)
return (0x9 << ARM_AFF1_SHIFT) | cpu;
}
-static DeviceState *pl330_create(uint32_t base, qemu_or_irq *orgate,
+static DeviceState *pl330_create(uint32_t base, OrIRQState *orgate,
qemu_irq irq, int nreq, int nevents, int width)
{
SysBusDevice *busdev;
@@ -806,7 +806,7 @@ static void exynos4210_init(Object *obj)
for (i = 0; i < ARRAY_SIZE(s->pl330_irq_orgate); i++) {
char *name = g_strdup_printf("pl330-irq-orgate%d", i);
- qemu_or_irq *orgate = &s->pl330_irq_orgate[i];
+ OrIRQState *orgate = &s->pl330_irq_orgate[i];
object_initialize_child(obj, name, orgate, TYPE_OR_IRQ);
g_free(name);
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 284c09c91d..07aecd9497 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -152,7 +152,7 @@ struct MPS2TZMachineState {
TZMSC msc[4];
CMSDKAPBUART uart[6];
SplitIRQ sec_resp_splitter;
- qemu_or_irq uart_irq_orgate;
+ OrIRQState uart_irq_orgate;
DeviceState *lan9118;
SplitIRQ cpu_irq_splitter[MPS2TZ_NUMIRQ_MAX];
Clock *sysclk;
diff --git a/hw/core/or-irq.c b/hw/core/or-irq.c
index d8f3754e96..1df4bc05a7 100644
--- a/hw/core/or-irq.c
+++ b/hw/core/or-irq.c
@@ -31,7 +31,7 @@
static void or_irq_handler(void *opaque, int n, int level)
{
- qemu_or_irq *s = OR_IRQ(opaque);
+ OrIRQState *s = OR_IRQ(opaque);
int or_level = 0;
int i;
@@ -46,7 +46,7 @@ static void or_irq_handler(void *opaque, int n, int level)
static void or_irq_reset(DeviceState *dev)
{
- qemu_or_irq *s = OR_IRQ(dev);
+ OrIRQState *s = OR_IRQ(dev);
int i;
for (i = 0; i < MAX_OR_LINES; i++) {
@@ -56,7 +56,7 @@ static void or_irq_reset(DeviceState *dev)
static void or_irq_realize(DeviceState *dev, Error **errp)
{
- qemu_or_irq *s = OR_IRQ(dev);
+ OrIRQState *s = OR_IRQ(dev);
assert(s->num_lines <= MAX_OR_LINES);
@@ -65,7 +65,7 @@ static void or_irq_realize(DeviceState *dev, Error **errp)
static void or_irq_init(Object *obj)
{
- qemu_or_irq *s = OR_IRQ(obj);
+ OrIRQState *s = OR_IRQ(obj);
qdev_init_gpio_out(DEVICE(obj), &s->out_irq, 1);
}
@@ -84,7 +84,7 @@ static void or_irq_init(Object *obj)
static bool vmstate_extras_needed(void *opaque)
{
- qemu_or_irq *s = OR_IRQ(opaque);
+ OrIRQState *s = OR_IRQ(opaque);
return s->num_lines >= OLD_MAX_OR_LINES;
}
@@ -95,7 +95,7 @@ static const VMStateDescription vmstate_or_irq_extras = {
.minimum_version_id = 1,
.needed = vmstate_extras_needed,
.fields = (VMStateField[]) {
- VMSTATE_VARRAY_UINT16_UNSAFE(levels, qemu_or_irq, num_lines, 0,
+ VMSTATE_VARRAY_UINT16_UNSAFE(levels, OrIRQState, num_lines, 0,
vmstate_info_bool, bool),
VMSTATE_END_OF_LIST(),
},
@@ -106,7 +106,7 @@ static const VMStateDescription vmstate_or_irq = {
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
- VMSTATE_BOOL_SUB_ARRAY(levels, qemu_or_irq, 0, OLD_MAX_OR_LINES),
+ VMSTATE_BOOL_SUB_ARRAY(levels, OrIRQState, 0, OLD_MAX_OR_LINES),
VMSTATE_END_OF_LIST(),
},
.subsections = (const VMStateDescription*[]) {
@@ -116,7 +116,7 @@ static const VMStateDescription vmstate_or_irq = {
};
static Property or_irq_properties[] = {
- DEFINE_PROP_UINT16("num-lines", qemu_or_irq, num_lines, 1),
+ DEFINE_PROP_UINT16("num-lines", OrIRQState, num_lines, 1),
DEFINE_PROP_END_OF_LIST(),
};
@@ -136,7 +136,7 @@ static void or_irq_class_init(ObjectClass *klass, void *data)
static const TypeInfo or_irq_type_info = {
.name = TYPE_OR_IRQ,
.parent = TYPE_DEVICE,
- .instance_size = sizeof(qemu_or_irq),
+ .instance_size = sizeof(OrIRQState),
.instance_init = or_irq_init,
.class_init = or_irq_class_init,
};
diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c
index 2c96ddf8fe..5e0a5b9303 100644
--- a/hw/pci-host/raven.c
+++ b/hw/pci-host/raven.c
@@ -60,7 +60,7 @@ DECLARE_INSTANCE_CHECKER(PREPPCIState, RAVEN_PCI_HOST_BRIDGE,
struct PRePPCIState {
PCIHostState parent_obj;
- qemu_or_irq *or_irq;
+ OrIRQState *or_irq;
qemu_irq pci_irqs[PCI_NUM_PINS];
PCIBus pci_bus;
AddressSpace pci_io_as;
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
index 9648e7a419..cd0931d0a0 100644
--- a/include/hw/arm/armsse.h
+++ b/include/hw/arm/armsse.h
@@ -155,12 +155,12 @@ struct ARMSSE {
TZPPC apb_ppc[NUM_INTERNAL_PPCS];
TZMPC mpc[IOTS_NUM_MPC];
CMSDKAPBTimer timer[3];
- qemu_or_irq ppc_irq_orgate;
+ OrIRQState ppc_irq_orgate;
SplitIRQ sec_resp_splitter;
SplitIRQ ppc_irq_splitter[NUM_PPCS];
SplitIRQ mpc_irq_splitter[IOTS_NUM_EXP_MPC + IOTS_NUM_MPC];
- qemu_or_irq mpc_irq_orgate;
- qemu_or_irq nmi_orgate;
+ OrIRQState mpc_irq_orgate;
+ OrIRQState nmi_orgate;
SplitIRQ cpu_irq_splitter[NUM_SSE_IRQS];
diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index c9d25d493e..d724a2fc28 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -56,7 +56,7 @@ struct BCM2835PeripheralState {
BCM2835AuxState aux;
BCM2835FBState fb;
BCM2835DMAState dma;
- qemu_or_irq orgated_dma_irq;
+ OrIRQState orgated_dma_irq;
BCM2835ICState ic;
BCM2835PropertyState property;
BCM2835RngState rng;
diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h
index 97353f1c02..68db19f0cb 100644
--- a/include/hw/arm/exynos4210.h
+++ b/include/hw/arm/exynos4210.h
@@ -96,8 +96,8 @@ struct Exynos4210State {
MemoryRegion boot_secondary;
MemoryRegion bootreg_mem;
I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
- qemu_or_irq pl330_irq_orgate[EXYNOS4210_NUM_DMA];
- qemu_or_irq cpu_irq_orgate[EXYNOS4210_NCPUS];
+ OrIRQState pl330_irq_orgate[EXYNOS4210_NUM_DMA];
+ OrIRQState cpu_irq_orgate[EXYNOS4210_NCPUS];
A9MPPrivState a9mpcore;
Exynos4210GicState ext_gic;
Exynos4210CombinerState int_combiner;
diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h
index 849d3ed889..5a4f776264 100644
--- a/include/hw/arm/stm32f205_soc.h
+++ b/include/hw/arm/stm32f205_soc.h
@@ -63,7 +63,7 @@ struct STM32F205State {
STM32F2XXADCState adc[STM_NUM_ADCS];
STM32F2XXSPIState spi[STM_NUM_SPIS];
- qemu_or_irq *adc_irqs;
+ OrIRQState *adc_irqs;
MemoryRegion sram;
MemoryRegion flash;
diff --git a/include/hw/arm/stm32f405_soc.h b/include/hw/arm/stm32f405_soc.h
index 249ab5434e..c968ce3ab2 100644
--- a/include/hw/arm/stm32f405_soc.h
+++ b/include/hw/arm/stm32f405_soc.h
@@ -63,7 +63,7 @@ struct STM32F405State {
STM32F4xxExtiState exti;
STM32F2XXUsartState usart[STM_NUM_USARTS];
STM32F2XXTimerState timer[STM_NUM_TIMERS];
- qemu_or_irq adc_irqs;
+ OrIRQState adc_irqs;
STM32F2XXADCState adc[STM_NUM_ADCS];
STM32F2XXSPIState spi[STM_NUM_SPIS];
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index cbe8a19c10..b6786e9832 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -85,7 +85,7 @@ struct Versal {
} rpu;
struct {
- qemu_or_irq irq_orgate;
+ OrIRQState irq_orgate;
XlnxXramCtrl ctrl[XLNX_VERSAL_NR_XRAM];
} xram;
@@ -103,7 +103,7 @@ struct Versal {
XlnxCSUDMA dma_src;
XlnxCSUDMA dma_dst;
MemoryRegion linear_mr;
- qemu_or_irq irq_orgate;
+ OrIRQState irq_orgate;
} ospi;
} iou;
@@ -113,7 +113,7 @@ struct Versal {
XlnxVersalEFuseCtrl efuse_ctrl;
XlnxVersalEFuseCache efuse_cache;
- qemu_or_irq apb_irq_orgate;
+ OrIRQState apb_irq_orgate;
} pmc;
struct {
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index 20bdf894aa..687c75e3b0 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -130,7 +130,7 @@ struct XlnxZynqMPState {
XlnxZDMA gdma[XLNX_ZYNQMP_NUM_GDMA_CH];
XlnxZDMA adma[XLNX_ZYNQMP_NUM_ADMA_CH];
XlnxCSUDMA qspi_dma;
- qemu_or_irq qspi_irq_orgate;
+ OrIRQState qspi_irq_orgate;
XlnxZynqMPAPUCtrl apu_ctrl;
XlnxZynqMPCRF crf;
CadenceTTCState ttc[XLNX_ZYNQMP_NUM_TTC];
diff --git a/include/hw/or-irq.h b/include/hw/or-irq.h
index 131abc2e0c..c0a42f3711 100644
--- a/include/hw/or-irq.h
+++ b/include/hw/or-irq.h
@@ -35,8 +35,6 @@
*/
#define MAX_OR_LINES 48
-typedef struct OrIRQState qemu_or_irq;
-
OBJECT_DECLARE_SIMPLE_TYPE(OrIRQState, OR_IRQ)
struct OrIRQState {
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 1/4] iothread: Remove unused IOThreadClass / IOTHREAD_CLASS
2023-01-13 20:01 ` [PATCH 1/4] iothread: Remove unused IOThreadClass / IOTHREAD_CLASS Philippe Mathieu-Daudé
@ 2023-01-16 2:45 ` Alistair Francis
0 siblings, 0 replies; 12+ messages in thread
From: Alistair Francis @ 2023-01-16 2:45 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Stefan Hajnoczi, qemu-arm, Peter Maydell, qemu-ppc,
Edgar E. Iglesias, qemu-trivial, Alistair Francis
On Sat, Jan 14, 2023 at 6:04 AM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Since commit be8d853766 ("iothread: add I/O thread object") we
> never used IOThreadClass / IOTHREAD_CLASS() / IOTHREAD_GET_CLASS(),
> remove these definitions.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> iothread.c | 4 ----
> 1 file changed, 4 deletions(-)
>
> diff --git a/iothread.c b/iothread.c
> index 3862a64471..b41c305bd9 100644
> --- a/iothread.c
> +++ b/iothread.c
> @@ -25,10 +25,6 @@
> #include "qemu/rcu.h"
> #include "qemu/main-loop.h"
>
> -typedef ObjectClass IOThreadClass;
> -
> -DECLARE_CLASS_CHECKERS(IOThreadClass, IOTHREAD,
> - TYPE_IOTHREAD)
>
> #ifdef CONFIG_POSIX
> /* Benchmark results from 2016 on NVMe SSD drives show max polling times around
> --
> 2.38.1
>
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/4] hw/irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
2023-01-13 20:01 ` [PATCH 2/4] hw/irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE() Philippe Mathieu-Daudé
@ 2023-01-16 2:46 ` Alistair Francis
0 siblings, 0 replies; 12+ messages in thread
From: Alistair Francis @ 2023-01-16 2:46 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Stefan Hajnoczi, qemu-arm, Peter Maydell, qemu-ppc,
Edgar E. Iglesias, qemu-trivial, Alistair Francis
On Sat, Jan 14, 2023 at 6:03 AM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> QOM *DECLARE* macros expect a typedef as first argument,
> not a structure. Replace 'struct IRQState' by 'IRQState'
> to avoid when modifying the macros:
>
> ../hw/core/irq.c:29:1: error: declaration of anonymous struct must be a definition
> DECLARE_INSTANCE_CHECKER(struct IRQState, IRQ,
> ^
>
> Use OBJECT_DECLARE_SIMPLE_TYPE instead of DECLARE_INSTANCE_CHECKER.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/core/irq.c | 9 ++++-----
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/hw/core/irq.c b/hw/core/irq.c
> index 3623f711fe..3f14e2dda7 100644
> --- a/hw/core/irq.c
> +++ b/hw/core/irq.c
> @@ -26,8 +26,7 @@
> #include "hw/irq.h"
> #include "qom/object.h"
>
> -DECLARE_INSTANCE_CHECKER(struct IRQState, IRQ,
> - TYPE_IRQ)
> +OBJECT_DECLARE_SIMPLE_TYPE(IRQState, IRQ)
>
> struct IRQState {
> Object parent_obj;
> @@ -68,7 +67,7 @@ qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n)
>
> qemu_irq qemu_allocate_irq(qemu_irq_handler handler, void *opaque, int n)
> {
> - struct IRQState *irq;
> + IRQState *irq;
>
> irq = IRQ(object_new(TYPE_IRQ));
> irq->handler = handler;
> @@ -94,7 +93,7 @@ void qemu_free_irq(qemu_irq irq)
>
> static void qemu_notirq(void *opaque, int line, int level)
> {
> - struct IRQState *irq = opaque;
> + IRQState *irq = opaque;
>
> irq->handler(irq->opaque, irq->n, !level);
> }
> @@ -120,7 +119,7 @@ void qemu_irq_intercept_in(qemu_irq *gpio_in, qemu_irq_handler handler, int n)
> static const TypeInfo irq_type_info = {
> .name = TYPE_IRQ,
> .parent = TYPE_OBJECT,
> - .instance_size = sizeof(struct IRQState),
> + .instance_size = sizeof(IRQState),
> };
>
> static void irq_register_types(void)
> --
> 2.38.1
>
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/4] hw/or-irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
2023-01-13 20:01 ` [PATCH 3/4] hw/or-irq: " Philippe Mathieu-Daudé
@ 2023-01-16 2:47 ` Alistair Francis
0 siblings, 0 replies; 12+ messages in thread
From: Alistair Francis @ 2023-01-16 2:47 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Stefan Hajnoczi, qemu-arm, Peter Maydell, qemu-ppc,
Edgar E. Iglesias, qemu-trivial, Alistair Francis
On Sat, Jan 14, 2023 at 6:03 AM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Missed during automatic conversion from commit 8063396bf3
> ("Use OBJECT_DECLARE_SIMPLE_TYPE when possible").
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/or-irq.h | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/include/hw/or-irq.h b/include/hw/or-irq.h
> index f2f0a27381..131abc2e0c 100644
> --- a/include/hw/or-irq.h
> +++ b/include/hw/or-irq.h
> @@ -37,8 +37,7 @@
>
> typedef struct OrIRQState qemu_or_irq;
>
> -DECLARE_INSTANCE_CHECKER(qemu_or_irq, OR_IRQ,
> - TYPE_OR_IRQ)
> +OBJECT_DECLARE_SIMPLE_TYPE(OrIRQState, OR_IRQ)
>
> struct OrIRQState {
> DeviceState parent_obj;
> --
> 2.38.1
>
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 4/4] hw: Replace qemu_or_irq typedef by OrIRQState
2023-01-13 20:01 ` [PATCH 4/4] hw: Replace qemu_or_irq typedef by OrIRQState Philippe Mathieu-Daudé
@ 2023-01-16 2:48 ` Alistair Francis
0 siblings, 0 replies; 12+ messages in thread
From: Alistair Francis @ 2023-01-16 2:48 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Stefan Hajnoczi, qemu-arm, Peter Maydell, qemu-ppc,
Edgar E. Iglesias, qemu-trivial, Alistair Francis
On Sat, Jan 14, 2023 at 6:04 AM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> OBJECT_DECLARE_SIMPLE_TYPE() macro provides the OrIRQState
> declaration for free. Besides, the QOM code style is to use
> the structure name as typedef, and QEMU style is to use Camel
> Case, so rename qemu_or_irq as OrIRQState.
>
> Mechanical change using:
>
> $ sed -i -e 's/qemu_or_irq/OrIRQState/g' $(git grep -l qemu_or_irq)
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/arm/exynos4210.c | 4 ++--
> hw/arm/mps2-tz.c | 2 +-
> hw/core/or-irq.c | 18 +++++++++---------
> hw/pci-host/raven.c | 2 +-
> include/hw/arm/armsse.h | 6 +++---
> include/hw/arm/bcm2835_peripherals.h | 2 +-
> include/hw/arm/exynos4210.h | 4 ++--
> include/hw/arm/stm32f205_soc.h | 2 +-
> include/hw/arm/stm32f405_soc.h | 2 +-
> include/hw/arm/xlnx-versal.h | 6 +++---
> include/hw/arm/xlnx-zynqmp.h | 2 +-
> include/hw/or-irq.h | 2 --
> 12 files changed, 25 insertions(+), 27 deletions(-)
>
> diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
> index 8dafa2215b..6f2dda13f6 100644
> --- a/hw/arm/exynos4210.c
> +++ b/hw/arm/exynos4210.c
> @@ -507,7 +507,7 @@ static uint64_t exynos4210_calc_affinity(int cpu)
> return (0x9 << ARM_AFF1_SHIFT) | cpu;
> }
>
> -static DeviceState *pl330_create(uint32_t base, qemu_or_irq *orgate,
> +static DeviceState *pl330_create(uint32_t base, OrIRQState *orgate,
> qemu_irq irq, int nreq, int nevents, int width)
> {
> SysBusDevice *busdev;
> @@ -806,7 +806,7 @@ static void exynos4210_init(Object *obj)
>
> for (i = 0; i < ARRAY_SIZE(s->pl330_irq_orgate); i++) {
> char *name = g_strdup_printf("pl330-irq-orgate%d", i);
> - qemu_or_irq *orgate = &s->pl330_irq_orgate[i];
> + OrIRQState *orgate = &s->pl330_irq_orgate[i];
>
> object_initialize_child(obj, name, orgate, TYPE_OR_IRQ);
> g_free(name);
> diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
> index 284c09c91d..07aecd9497 100644
> --- a/hw/arm/mps2-tz.c
> +++ b/hw/arm/mps2-tz.c
> @@ -152,7 +152,7 @@ struct MPS2TZMachineState {
> TZMSC msc[4];
> CMSDKAPBUART uart[6];
> SplitIRQ sec_resp_splitter;
> - qemu_or_irq uart_irq_orgate;
> + OrIRQState uart_irq_orgate;
> DeviceState *lan9118;
> SplitIRQ cpu_irq_splitter[MPS2TZ_NUMIRQ_MAX];
> Clock *sysclk;
> diff --git a/hw/core/or-irq.c b/hw/core/or-irq.c
> index d8f3754e96..1df4bc05a7 100644
> --- a/hw/core/or-irq.c
> +++ b/hw/core/or-irq.c
> @@ -31,7 +31,7 @@
>
> static void or_irq_handler(void *opaque, int n, int level)
> {
> - qemu_or_irq *s = OR_IRQ(opaque);
> + OrIRQState *s = OR_IRQ(opaque);
> int or_level = 0;
> int i;
>
> @@ -46,7 +46,7 @@ static void or_irq_handler(void *opaque, int n, int level)
>
> static void or_irq_reset(DeviceState *dev)
> {
> - qemu_or_irq *s = OR_IRQ(dev);
> + OrIRQState *s = OR_IRQ(dev);
> int i;
>
> for (i = 0; i < MAX_OR_LINES; i++) {
> @@ -56,7 +56,7 @@ static void or_irq_reset(DeviceState *dev)
>
> static void or_irq_realize(DeviceState *dev, Error **errp)
> {
> - qemu_or_irq *s = OR_IRQ(dev);
> + OrIRQState *s = OR_IRQ(dev);
>
> assert(s->num_lines <= MAX_OR_LINES);
>
> @@ -65,7 +65,7 @@ static void or_irq_realize(DeviceState *dev, Error **errp)
>
> static void or_irq_init(Object *obj)
> {
> - qemu_or_irq *s = OR_IRQ(obj);
> + OrIRQState *s = OR_IRQ(obj);
>
> qdev_init_gpio_out(DEVICE(obj), &s->out_irq, 1);
> }
> @@ -84,7 +84,7 @@ static void or_irq_init(Object *obj)
>
> static bool vmstate_extras_needed(void *opaque)
> {
> - qemu_or_irq *s = OR_IRQ(opaque);
> + OrIRQState *s = OR_IRQ(opaque);
>
> return s->num_lines >= OLD_MAX_OR_LINES;
> }
> @@ -95,7 +95,7 @@ static const VMStateDescription vmstate_or_irq_extras = {
> .minimum_version_id = 1,
> .needed = vmstate_extras_needed,
> .fields = (VMStateField[]) {
> - VMSTATE_VARRAY_UINT16_UNSAFE(levels, qemu_or_irq, num_lines, 0,
> + VMSTATE_VARRAY_UINT16_UNSAFE(levels, OrIRQState, num_lines, 0,
> vmstate_info_bool, bool),
> VMSTATE_END_OF_LIST(),
> },
> @@ -106,7 +106,7 @@ static const VMStateDescription vmstate_or_irq = {
> .version_id = 1,
> .minimum_version_id = 1,
> .fields = (VMStateField[]) {
> - VMSTATE_BOOL_SUB_ARRAY(levels, qemu_or_irq, 0, OLD_MAX_OR_LINES),
> + VMSTATE_BOOL_SUB_ARRAY(levels, OrIRQState, 0, OLD_MAX_OR_LINES),
> VMSTATE_END_OF_LIST(),
> },
> .subsections = (const VMStateDescription*[]) {
> @@ -116,7 +116,7 @@ static const VMStateDescription vmstate_or_irq = {
> };
>
> static Property or_irq_properties[] = {
> - DEFINE_PROP_UINT16("num-lines", qemu_or_irq, num_lines, 1),
> + DEFINE_PROP_UINT16("num-lines", OrIRQState, num_lines, 1),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> @@ -136,7 +136,7 @@ static void or_irq_class_init(ObjectClass *klass, void *data)
> static const TypeInfo or_irq_type_info = {
> .name = TYPE_OR_IRQ,
> .parent = TYPE_DEVICE,
> - .instance_size = sizeof(qemu_or_irq),
> + .instance_size = sizeof(OrIRQState),
> .instance_init = or_irq_init,
> .class_init = or_irq_class_init,
> };
> diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c
> index 2c96ddf8fe..5e0a5b9303 100644
> --- a/hw/pci-host/raven.c
> +++ b/hw/pci-host/raven.c
> @@ -60,7 +60,7 @@ DECLARE_INSTANCE_CHECKER(PREPPCIState, RAVEN_PCI_HOST_BRIDGE,
> struct PRePPCIState {
> PCIHostState parent_obj;
>
> - qemu_or_irq *or_irq;
> + OrIRQState *or_irq;
> qemu_irq pci_irqs[PCI_NUM_PINS];
> PCIBus pci_bus;
> AddressSpace pci_io_as;
> diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
> index 9648e7a419..cd0931d0a0 100644
> --- a/include/hw/arm/armsse.h
> +++ b/include/hw/arm/armsse.h
> @@ -155,12 +155,12 @@ struct ARMSSE {
> TZPPC apb_ppc[NUM_INTERNAL_PPCS];
> TZMPC mpc[IOTS_NUM_MPC];
> CMSDKAPBTimer timer[3];
> - qemu_or_irq ppc_irq_orgate;
> + OrIRQState ppc_irq_orgate;
> SplitIRQ sec_resp_splitter;
> SplitIRQ ppc_irq_splitter[NUM_PPCS];
> SplitIRQ mpc_irq_splitter[IOTS_NUM_EXP_MPC + IOTS_NUM_MPC];
> - qemu_or_irq mpc_irq_orgate;
> - qemu_or_irq nmi_orgate;
> + OrIRQState mpc_irq_orgate;
> + OrIRQState nmi_orgate;
>
> SplitIRQ cpu_irq_splitter[NUM_SSE_IRQS];
>
> diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
> index c9d25d493e..d724a2fc28 100644
> --- a/include/hw/arm/bcm2835_peripherals.h
> +++ b/include/hw/arm/bcm2835_peripherals.h
> @@ -56,7 +56,7 @@ struct BCM2835PeripheralState {
> BCM2835AuxState aux;
> BCM2835FBState fb;
> BCM2835DMAState dma;
> - qemu_or_irq orgated_dma_irq;
> + OrIRQState orgated_dma_irq;
> BCM2835ICState ic;
> BCM2835PropertyState property;
> BCM2835RngState rng;
> diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h
> index 97353f1c02..68db19f0cb 100644
> --- a/include/hw/arm/exynos4210.h
> +++ b/include/hw/arm/exynos4210.h
> @@ -96,8 +96,8 @@ struct Exynos4210State {
> MemoryRegion boot_secondary;
> MemoryRegion bootreg_mem;
> I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
> - qemu_or_irq pl330_irq_orgate[EXYNOS4210_NUM_DMA];
> - qemu_or_irq cpu_irq_orgate[EXYNOS4210_NCPUS];
> + OrIRQState pl330_irq_orgate[EXYNOS4210_NUM_DMA];
> + OrIRQState cpu_irq_orgate[EXYNOS4210_NCPUS];
> A9MPPrivState a9mpcore;
> Exynos4210GicState ext_gic;
> Exynos4210CombinerState int_combiner;
> diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h
> index 849d3ed889..5a4f776264 100644
> --- a/include/hw/arm/stm32f205_soc.h
> +++ b/include/hw/arm/stm32f205_soc.h
> @@ -63,7 +63,7 @@ struct STM32F205State {
> STM32F2XXADCState adc[STM_NUM_ADCS];
> STM32F2XXSPIState spi[STM_NUM_SPIS];
>
> - qemu_or_irq *adc_irqs;
> + OrIRQState *adc_irqs;
>
> MemoryRegion sram;
> MemoryRegion flash;
> diff --git a/include/hw/arm/stm32f405_soc.h b/include/hw/arm/stm32f405_soc.h
> index 249ab5434e..c968ce3ab2 100644
> --- a/include/hw/arm/stm32f405_soc.h
> +++ b/include/hw/arm/stm32f405_soc.h
> @@ -63,7 +63,7 @@ struct STM32F405State {
> STM32F4xxExtiState exti;
> STM32F2XXUsartState usart[STM_NUM_USARTS];
> STM32F2XXTimerState timer[STM_NUM_TIMERS];
> - qemu_or_irq adc_irqs;
> + OrIRQState adc_irqs;
> STM32F2XXADCState adc[STM_NUM_ADCS];
> STM32F2XXSPIState spi[STM_NUM_SPIS];
>
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index cbe8a19c10..b6786e9832 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -85,7 +85,7 @@ struct Versal {
> } rpu;
>
> struct {
> - qemu_or_irq irq_orgate;
> + OrIRQState irq_orgate;
> XlnxXramCtrl ctrl[XLNX_VERSAL_NR_XRAM];
> } xram;
>
> @@ -103,7 +103,7 @@ struct Versal {
> XlnxCSUDMA dma_src;
> XlnxCSUDMA dma_dst;
> MemoryRegion linear_mr;
> - qemu_or_irq irq_orgate;
> + OrIRQState irq_orgate;
> } ospi;
> } iou;
>
> @@ -113,7 +113,7 @@ struct Versal {
> XlnxVersalEFuseCtrl efuse_ctrl;
> XlnxVersalEFuseCache efuse_cache;
>
> - qemu_or_irq apb_irq_orgate;
> + OrIRQState apb_irq_orgate;
> } pmc;
>
> struct {
> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> index 20bdf894aa..687c75e3b0 100644
> --- a/include/hw/arm/xlnx-zynqmp.h
> +++ b/include/hw/arm/xlnx-zynqmp.h
> @@ -130,7 +130,7 @@ struct XlnxZynqMPState {
> XlnxZDMA gdma[XLNX_ZYNQMP_NUM_GDMA_CH];
> XlnxZDMA adma[XLNX_ZYNQMP_NUM_ADMA_CH];
> XlnxCSUDMA qspi_dma;
> - qemu_or_irq qspi_irq_orgate;
> + OrIRQState qspi_irq_orgate;
> XlnxZynqMPAPUCtrl apu_ctrl;
> XlnxZynqMPCRF crf;
> CadenceTTCState ttc[XLNX_ZYNQMP_NUM_TTC];
> diff --git a/include/hw/or-irq.h b/include/hw/or-irq.h
> index 131abc2e0c..c0a42f3711 100644
> --- a/include/hw/or-irq.h
> +++ b/include/hw/or-irq.h
> @@ -35,8 +35,6 @@
> */
> #define MAX_OR_LINES 48
>
> -typedef struct OrIRQState qemu_or_irq;
> -
> OBJECT_DECLARE_SIMPLE_TYPE(OrIRQState, OR_IRQ)
>
> struct OrIRQState {
> --
> 2.38.1
>
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types
2023-01-13 20:01 [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2023-01-13 20:01 ` [PATCH 4/4] hw: Replace qemu_or_irq typedef by OrIRQState Philippe Mathieu-Daudé
@ 2023-01-17 16:15 ` Stefan Hajnoczi
2023-02-07 9:17 ` Philippe Mathieu-Daudé
5 siblings, 0 replies; 12+ messages in thread
From: Stefan Hajnoczi @ 2023-01-17 16:15 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, qemu-arm, Peter Maydell, qemu-ppc, Edgar E. Iglesias,
qemu-trivial, Alistair Francis
[-- Attachment #1: Type: text/plain, Size: 1299 bytes --]
On Fri, Jan 13, 2023 at 09:01:34PM +0100, Philippe Mathieu-Daudé wrote:
> - remove unused code
> - use recent QOM macros
> - use CamelCase typedef
>
> Philippe Mathieu-Daudé (4):
> iothread: Remove unused IOThreadClass / IOTHREAD_CLASS
> hw/irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
> hw/or-irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
> hw: Replace qemu_or_irq typedef by OrIRQState
>
> hw/arm/exynos4210.c | 4 ++--
> hw/arm/mps2-tz.c | 2 +-
> hw/core/irq.c | 9 ++++-----
> hw/core/or-irq.c | 18 +++++++++---------
> hw/pci-host/raven.c | 2 +-
> include/hw/arm/armsse.h | 6 +++---
> include/hw/arm/bcm2835_peripherals.h | 2 +-
> include/hw/arm/exynos4210.h | 4 ++--
> include/hw/arm/stm32f205_soc.h | 2 +-
> include/hw/arm/stm32f405_soc.h | 2 +-
> include/hw/arm/xlnx-versal.h | 6 +++---
> include/hw/arm/xlnx-zynqmp.h | 2 +-
> include/hw/or-irq.h | 5 +----
> iothread.c | 4 ----
> 14 files changed, 30 insertions(+), 38 deletions(-)
>
> --
> 2.38.1
>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types
2023-01-13 20:01 [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2023-01-17 16:15 ` [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types Stefan Hajnoczi
@ 2023-02-07 9:17 ` Philippe Mathieu-Daudé
2023-02-23 13:36 ` Peter Maydell
5 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-07 9:17 UTC (permalink / raw)
To: qemu-devel, Peter Maydell
Cc: Stefan Hajnoczi, qemu-arm, qemu-ppc, Edgar E. Iglesias,
qemu-trivial, Alistair Francis
Hi Peter,
On 13/1/23 21:01, Philippe Mathieu-Daudé wrote:
> - remove unused code
> - use recent QOM macros
> - use CamelCase typedef
>
> Philippe Mathieu-Daudé (4):
> iothread: Remove unused IOThreadClass / IOTHREAD_CLASS
> hw/irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
> hw/or-irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
> hw: Replace qemu_or_irq typedef by OrIRQState
>
> hw/arm/exynos4210.c | 4 ++--
> hw/arm/mps2-tz.c | 2 +-
> hw/core/irq.c | 9 ++++-----
> hw/core/or-irq.c | 18 +++++++++---------
> hw/pci-host/raven.c | 2 +-
> include/hw/arm/armsse.h | 6 +++---
> include/hw/arm/bcm2835_peripherals.h | 2 +-
> include/hw/arm/exynos4210.h | 4 ++--
> include/hw/arm/stm32f205_soc.h | 2 +-
> include/hw/arm/stm32f405_soc.h | 2 +-
> include/hw/arm/xlnx-versal.h | 6 +++---
> include/hw/arm/xlnx-zynqmp.h | 2 +-
> include/hw/or-irq.h | 5 +----
> iothread.c | 4 ----
> 14 files changed, 30 insertions(+), 38 deletions(-)
Since most changes concern ARM machines, can this (reviewed)
series go via your tree?
Thanks,
Phil.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types
2023-02-07 9:17 ` Philippe Mathieu-Daudé
@ 2023-02-23 13:36 ` Peter Maydell
0 siblings, 0 replies; 12+ messages in thread
From: Peter Maydell @ 2023-02-23 13:36 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Stefan Hajnoczi, qemu-arm, qemu-ppc,
Edgar E. Iglesias, qemu-trivial, Alistair Francis
On Tue, 7 Feb 2023 at 09:17, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> Hi Peter,
>
> On 13/1/23 21:01, Philippe Mathieu-Daudé wrote:
> > - remove unused code
> > - use recent QOM macros
> > - use CamelCase typedef
> >
> > Philippe Mathieu-Daudé (4):
> > iothread: Remove unused IOThreadClass / IOTHREAD_CLASS
> > hw/irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
> > hw/or-irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
> > hw: Replace qemu_or_irq typedef by OrIRQState
> >
> > hw/arm/exynos4210.c | 4 ++--
> > hw/arm/mps2-tz.c | 2 +-
> > hw/core/irq.c | 9 ++++-----
> > hw/core/or-irq.c | 18 +++++++++---------
> > hw/pci-host/raven.c | 2 +-
> > include/hw/arm/armsse.h | 6 +++---
> > include/hw/arm/bcm2835_peripherals.h | 2 +-
> > include/hw/arm/exynos4210.h | 4 ++--
> > include/hw/arm/stm32f205_soc.h | 2 +-
> > include/hw/arm/stm32f405_soc.h | 2 +-
> > include/hw/arm/xlnx-versal.h | 6 +++---
> > include/hw/arm/xlnx-zynqmp.h | 2 +-
> > include/hw/or-irq.h | 5 +----
> > iothread.c | 4 ----
> > 14 files changed, 30 insertions(+), 38 deletions(-)
>
> Since most changes concern ARM machines, can this (reviewed)
> series go via your tree?
Sure; applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2023-02-23 13:37 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-01-13 20:01 [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types Philippe Mathieu-Daudé
2023-01-13 20:01 ` [PATCH 1/4] iothread: Remove unused IOThreadClass / IOTHREAD_CLASS Philippe Mathieu-Daudé
2023-01-16 2:45 ` Alistair Francis
2023-01-13 20:01 ` [PATCH 2/4] hw/irq: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE() Philippe Mathieu-Daudé
2023-01-16 2:46 ` Alistair Francis
2023-01-13 20:01 ` [PATCH 3/4] hw/or-irq: " Philippe Mathieu-Daudé
2023-01-16 2:47 ` Alistair Francis
2023-01-13 20:01 ` [PATCH 4/4] hw: Replace qemu_or_irq typedef by OrIRQState Philippe Mathieu-Daudé
2023-01-16 2:48 ` Alistair Francis
2023-01-17 16:15 ` [PATCH 0/4] hw: QOM housekeeping around IOTHREAD / IRQ types Stefan Hajnoczi
2023-02-07 9:17 ` Philippe Mathieu-Daudé
2023-02-23 13:36 ` Peter Maydell
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