From: Alistair Francis <alistair.francis@opensource.wdc.com>
To: qemu-devel@nongnu.org
Cc: alistair23@gmail.com,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Alistair Francis" <alistair.francis@wdc.com>
Subject: [PULL 27/37] hw/riscv/virt.c: simplify create_fdt()
Date: Fri, 20 Jan 2023 17:39:03 +1000 [thread overview]
Message-ID: <20230120073913.1028407-28-alistair.francis@opensource.wdc.com> (raw)
In-Reply-To: <20230120073913.1028407-1-alistair.francis@opensource.wdc.com>
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
'mem_size' and 'cmdline' aren't being used. Remove them.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230111170948.316276-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/riscv/virt.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index c8e35f861e..1921d3caa3 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -999,7 +999,7 @@ static void create_fdt_fw_cfg(RISCVVirtState *s, const MemMapEntry *memmap)
}
static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap,
- uint64_t mem_size, const char *cmdline, bool is_32_bit)
+ bool is_32_bit)
{
MachineState *mc = MACHINE(s);
uint32_t phandle = 1, irq_mmio_phandle = 1, msi_pcie_phandle = 1;
@@ -1507,8 +1507,7 @@ static void virt_machine_init(MachineState *machine)
virt_flash_map(s, system_memory);
/* create device tree */
- create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline,
- riscv_is_32bit(&s->soc[0]));
+ create_fdt(s, memmap, riscv_is_32bit(&s->soc[0]));
s->machine_done.notify = virt_machine_done;
qemu_add_machine_init_done_notifier(&s->machine_done);
--
2.39.0
next prev parent reply other threads:[~2023-01-20 7:44 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-20 7:38 [PULL 00/37] riscv-to-apply queue Alistair Francis
2023-01-20 7:38 ` [PULL 01/37] hw/char: riscv_htif: Avoid using magic numbers Alistair Francis
2023-01-20 7:38 ` [PULL 02/37] hw/char: riscv_htif: Drop {to, from}host_size in HTIFState Alistair Francis
2023-01-20 7:38 ` [PULL 03/37] hw/char: riscv_htif: Drop useless assignment of memory region Alistair Francis
2023-01-20 7:38 ` [PULL 04/37] hw/char: riscv_htif: Use conventional 's' for HTIFState Alistair Francis
2023-01-20 7:38 ` [PULL 05/37] hw/char: riscv_htif: Move registers from CPUArchState to HTIFState Alistair Francis
2023-01-20 7:38 ` [PULL 06/37] hw/char: riscv_htif: Remove forward declarations for non-existent variables Alistair Francis
2023-01-20 7:38 ` [PULL 07/37] hw/char: riscv_htif: Support console output via proxy syscall Alistair Francis
2023-01-20 7:38 ` [PULL 08/37] hw/riscv: spike: Remove the out-of-date comments Alistair Francis
2023-01-20 7:38 ` [PULL 09/37] hw/riscv/boot.c: make riscv_find_firmware() static Alistair Francis
2023-01-20 7:38 ` [PULL 10/37] hw/riscv/boot.c: introduce riscv_default_firmware_name() Alistair Francis
2023-01-20 7:38 ` [PULL 11/37] hw/riscv/boot.c: Introduce riscv_find_firmware() Alistair Francis
2023-01-20 7:38 ` [PULL 12/37] hw/riscv: spike: Decouple create_fdt() dependency to ELF loading Alistair Francis
2023-01-20 7:38 ` [PULL 13/37] target/riscv/cpu.c: Fix elen check Alistair Francis
2023-01-20 7:38 ` [PULL 14/37] tests/avocado: add RISC-V OpenSBI boot test Alistair Francis
2023-01-20 7:38 ` [PULL 15/37] hw/riscv/spike: use 'fdt' from MachineState Alistair Francis
2023-01-20 7:38 ` [PULL 16/37] hw/riscv/sifive_u: " Alistair Francis
2023-01-20 7:38 ` [PULL 17/37] hw/riscv/boot.c: exit early if filename is NULL in load functions Alistair Francis
2023-01-20 7:38 ` [PULL 18/37] hw/riscv/spike.c: load initrd right after riscv_load_kernel() Alistair Francis
2023-01-20 7:38 ` [PULL 19/37] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() Alistair Francis
2023-01-20 7:38 ` [PULL 20/37] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel() Alistair Francis
2023-01-20 7:38 ` [PULL 21/37] hw/riscv/boot.c: use MachineState in riscv_load_initrd() Alistair Francis
2023-01-20 7:38 ` [PULL 22/37] hw/riscv/boot.c: use MachineState in riscv_load_kernel() Alistair Francis
2023-01-20 7:38 ` [PULL 23/37] target/riscv/cpu: set cpu->cfg in register_cpu_props() Alistair Francis
2023-01-20 7:39 ` [PULL 24/37] target/riscv/cpu.c: do not skip misa logic in riscv_cpu_realize() Alistair Francis
2023-01-20 7:39 ` [PULL 25/37] target/riscv: Use TARGET_FMT_lx for env->mhartid Alistair Francis
2023-01-20 7:39 ` [PULL 26/37] hw/riscv/spike.c: simplify create_fdt() Alistair Francis
2023-01-20 7:39 ` Alistair Francis [this message]
2023-01-20 7:39 ` [PULL 28/37] hw/riscv/sifive_u.c: " Alistair Francis
2023-01-20 7:39 ` [PULL 29/37] hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_socket_cpus() Alistair Francis
2023-01-20 7:39 ` [PULL 30/37] hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id() Alistair Francis
2023-01-20 7:39 ` [PULL 31/37] hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix() Alistair Francis
2023-01-20 7:39 ` [PULL 32/37] target/riscv: Fix up masking of vsip/vsie accesses Alistair Francis
2023-01-20 7:39 ` [PULL 33/37] target/riscv: Trap on writes to stimecmp from VS when hvictl.VTI=1 Alistair Francis
2023-01-20 7:39 ` [PULL 34/37] tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldst Alistair Francis
2023-01-20 7:39 ` [PULL 35/37] target/riscv: Introduce helper_set_rounding_mode_chkfrm Alistair Francis
2023-01-20 7:39 ` [PULL 36/37] target/riscv: Remove helper_set_rod_rounding_mode Alistair Francis
2023-01-20 7:39 ` [PULL 37/37] hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init() Alistair Francis
2023-01-21 13:01 ` [PULL 00/37] riscv-to-apply queue Peter Maydell
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