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From: Alistair Francis <alistair.francis@opensource.wdc.com>
To: qemu-devel@nongnu.org
Cc: alistair23@gmail.com, Bin Meng <bmeng@tinylab.org>,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	Alistair Francis <alistair.francis@wdc.com>
Subject: [PULL 07/37] hw/char: riscv_htif: Support console output via proxy syscall
Date: Fri, 20 Jan 2023 17:38:43 +1000	[thread overview]
Message-ID: <20230120073913.1028407-8-alistair.francis@opensource.wdc.com> (raw)
In-Reply-To: <20230120073913.1028407-1-alistair.francis@opensource.wdc.com>

From: Bin Meng <bmeng@tinylab.org>

At present the HTIF proxy syscall is unsupported. On RV32, only
device 0 is supported so there is no console device for RV32.
The only way to implement console funtionality on RV32 is to
support the SYS_WRITE syscall.

With this commit, the Spike machine is able to boot the 32-bit
OpenSBI generic image.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20221229091828.1945072-8-bmeng@tinylab.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 hw/char/riscv_htif.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c
index 3bb0a37a3e..1477fc0090 100644
--- a/hw/char/riscv_htif.c
+++ b/hw/char/riscv_htif.c
@@ -48,6 +48,9 @@
 #define HTIF_CONSOLE_CMD_GETC   0
 #define HTIF_CONSOLE_CMD_PUTC   1
 
+/* PK system call number */
+#define PK_SYS_WRITE            64
+
 static uint64_t fromhost_addr, tohost_addr;
 static int address_symbol_set;
 
@@ -165,7 +168,19 @@ static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written)
                 int exit_code = payload >> 1;
                 exit(exit_code);
             } else {
-                qemu_log_mask(LOG_UNIMP, "pk syscall proxy not supported\n");
+                uint64_t syscall[8];
+                cpu_physical_memory_read(payload, syscall, sizeof(syscall));
+                if (syscall[0] == PK_SYS_WRITE &&
+                    syscall[1] == HTIF_DEV_CONSOLE &&
+                    syscall[3] == HTIF_CONSOLE_CMD_PUTC) {
+                    uint8_t ch;
+                    cpu_physical_memory_read(syscall[2], &ch, 1);
+                    qemu_chr_fe_write(&s->chr, &ch, 1);
+                    resp = 0x100 | (uint8_t)payload;
+                } else {
+                    qemu_log_mask(LOG_UNIMP,
+                                  "pk syscall proxy not supported\n");
+                }
             }
         } else {
             qemu_log("HTIF device %d: unknown command\n", device);
-- 
2.39.0



  parent reply	other threads:[~2023-01-20  7:40 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-20  7:38 [PULL 00/37] riscv-to-apply queue Alistair Francis
2023-01-20  7:38 ` [PULL 01/37] hw/char: riscv_htif: Avoid using magic numbers Alistair Francis
2023-01-20  7:38 ` [PULL 02/37] hw/char: riscv_htif: Drop {to, from}host_size in HTIFState Alistair Francis
2023-01-20  7:38 ` [PULL 03/37] hw/char: riscv_htif: Drop useless assignment of memory region Alistair Francis
2023-01-20  7:38 ` [PULL 04/37] hw/char: riscv_htif: Use conventional 's' for HTIFState Alistair Francis
2023-01-20  7:38 ` [PULL 05/37] hw/char: riscv_htif: Move registers from CPUArchState to HTIFState Alistair Francis
2023-01-20  7:38 ` [PULL 06/37] hw/char: riscv_htif: Remove forward declarations for non-existent variables Alistair Francis
2023-01-20  7:38 ` Alistair Francis [this message]
2023-01-20  7:38 ` [PULL 08/37] hw/riscv: spike: Remove the out-of-date comments Alistair Francis
2023-01-20  7:38 ` [PULL 09/37] hw/riscv/boot.c: make riscv_find_firmware() static Alistair Francis
2023-01-20  7:38 ` [PULL 10/37] hw/riscv/boot.c: introduce riscv_default_firmware_name() Alistair Francis
2023-01-20  7:38 ` [PULL 11/37] hw/riscv/boot.c: Introduce riscv_find_firmware() Alistair Francis
2023-01-20  7:38 ` [PULL 12/37] hw/riscv: spike: Decouple create_fdt() dependency to ELF loading Alistair Francis
2023-01-20  7:38 ` [PULL 13/37] target/riscv/cpu.c: Fix elen check Alistair Francis
2023-01-20  7:38 ` [PULL 14/37] tests/avocado: add RISC-V OpenSBI boot test Alistair Francis
2023-01-20  7:38 ` [PULL 15/37] hw/riscv/spike: use 'fdt' from MachineState Alistair Francis
2023-01-20  7:38 ` [PULL 16/37] hw/riscv/sifive_u: " Alistair Francis
2023-01-20  7:38 ` [PULL 17/37] hw/riscv/boot.c: exit early if filename is NULL in load functions Alistair Francis
2023-01-20  7:38 ` [PULL 18/37] hw/riscv/spike.c: load initrd right after riscv_load_kernel() Alistair Francis
2023-01-20  7:38 ` [PULL 19/37] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() Alistair Francis
2023-01-20  7:38 ` [PULL 20/37] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel() Alistair Francis
2023-01-20  7:38 ` [PULL 21/37] hw/riscv/boot.c: use MachineState in riscv_load_initrd() Alistair Francis
2023-01-20  7:38 ` [PULL 22/37] hw/riscv/boot.c: use MachineState in riscv_load_kernel() Alistair Francis
2023-01-20  7:38 ` [PULL 23/37] target/riscv/cpu: set cpu->cfg in register_cpu_props() Alistair Francis
2023-01-20  7:39 ` [PULL 24/37] target/riscv/cpu.c: do not skip misa logic in riscv_cpu_realize() Alistair Francis
2023-01-20  7:39 ` [PULL 25/37] target/riscv: Use TARGET_FMT_lx for env->mhartid Alistair Francis
2023-01-20  7:39 ` [PULL 26/37] hw/riscv/spike.c: simplify create_fdt() Alistair Francis
2023-01-20  7:39 ` [PULL 27/37] hw/riscv/virt.c: " Alistair Francis
2023-01-20  7:39 ` [PULL 28/37] hw/riscv/sifive_u.c: " Alistair Francis
2023-01-20  7:39 ` [PULL 29/37] hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_socket_cpus() Alistair Francis
2023-01-20  7:39 ` [PULL 30/37] hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id() Alistair Francis
2023-01-20  7:39 ` [PULL 31/37] hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix() Alistair Francis
2023-01-20  7:39 ` [PULL 32/37] target/riscv: Fix up masking of vsip/vsie accesses Alistair Francis
2023-01-20  7:39 ` [PULL 33/37] target/riscv: Trap on writes to stimecmp from VS when hvictl.VTI=1 Alistair Francis
2023-01-20  7:39 ` [PULL 34/37] tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldst Alistair Francis
2023-01-20  7:39 ` [PULL 35/37] target/riscv: Introduce helper_set_rounding_mode_chkfrm Alistair Francis
2023-01-20  7:39 ` [PULL 36/37] target/riscv: Remove helper_set_rod_rounding_mode Alistair Francis
2023-01-20  7:39 ` [PULL 37/37] hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init() Alistair Francis
2023-01-21 13:01 ` [PULL 00/37] riscv-to-apply queue Peter Maydell

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