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From: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
To: qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org, peter.maydell@linaro.org
Subject: [PATCH v3 2/5] hw/char/pl011: add post_load hook for backwards-compatibility
Date: Fri, 20 Jan 2023 16:54:44 +0100	[thread overview]
Message-ID: <20230120155447.31702-3-eiakovlev@linux.microsoft.com> (raw)
In-Reply-To: <20230120155447.31702-1-eiakovlev@linux.microsoft.com>

Previous change slightly modified the way we handle data writes when
FIFO is disabled. Previously we kept incrementing read_pos and were
storing data at that position, although we only have a
single-register-deep FIFO now. Then we changed it to always store data
at pos 0.

If guest disables FIFO and the proceeds to read data, it will work out
fine, because we read from current read_pos before setting it to 0.

However, to make code less fragile, introduce a post_load hook for
PL011State and move fixup read FIFO state when FIFO is disabled. Since
we are introducing a post_load hook, also do some sanity checking on
untrusted incoming input state.

Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
---
 hw/char/pl011.c | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 3fa3b75d04..4df649a064 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -352,10 +352,35 @@ static const VMStateDescription vmstate_pl011_clock = {
     }
 };
 
+static int pl011_post_load(void *opaque, int version_id)
+{
+    PL011State* s = opaque;
+
+    /* Sanity-check input state */
+    if (s->read_pos >= ARRAY_SIZE(s->read_fifo) ||
+        s->read_count > ARRAY_SIZE(s->read_fifo)) {
+        return -1;
+    }
+
+    if (version_id < 3 && !pl011_is_fifo_enabled(s)) {
+        /*
+         * Older versions of PL011 didn't ensure that the single
+         * character in the FIFO in FIFO-disabled mode is in
+         * element 0 of the array; convert to follow the current
+         * code's assumptions.
+         */
+        s->read_fifo[0] = s->read_fifo[s->read_pos];
+        s->read_pos = 0;
+    }
+
+    return 0;
+}
+
 static const VMStateDescription vmstate_pl011 = {
     .name = "pl011",
-    .version_id = 2,
+    .version_id = 3,
     .minimum_version_id = 2,
+    .post_load = pl011_post_load,
     .fields = (VMStateField[]) {
         VMSTATE_UINT32(readbuff, PL011State),
         VMSTATE_UINT32(flags, PL011State),
-- 
2.34.1



  parent reply	other threads:[~2023-01-20 15:56 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-20 15:54 [PATCH v3 0/5] Series of fixes for PL011 char device Evgeny Iakovlev
2023-01-20 15:54 ` [PATCH v3 1/5] hw/char/pl011: refactor FIFO depth handling code Evgeny Iakovlev
2023-01-20 18:23   ` Peter Maydell
2023-01-23  7:29   ` Philippe Mathieu-Daudé
2023-01-20 15:54 ` Evgeny Iakovlev [this message]
2023-01-20 18:22   ` [PATCH v3 2/5] hw/char/pl011: add post_load hook for backwards-compatibility Peter Maydell
2023-01-23 14:39     ` Evgeny Iakovlev
2023-01-20 15:54 ` [PATCH v3 3/5] hw/char/pl011: implement a reset method Evgeny Iakovlev
2023-01-20 18:23   ` Peter Maydell
2023-01-23  7:25   ` Philippe Mathieu-Daudé
2023-01-20 15:54 ` [PATCH v3 4/5] hw/char/pl011: better handling of FIFO flags on LCR reset Evgeny Iakovlev
2023-01-20 18:23   ` Peter Maydell
2023-01-20 15:54 ` [PATCH v3 5/5] hw/char/pl011: check if UART is enabled before RX or TX operation Evgeny Iakovlev
2023-01-23  8:14   ` Philippe Mathieu-Daudé
2023-01-23 14:43     ` Evgeny Iakovlev
2023-01-23 15:21       ` Philippe Mathieu-Daudé
2023-01-23 15:59         ` Evgeny Iakovlev
2023-01-23 16:09           ` Evgeny Iakovlev
2023-01-23 16:45             ` Philippe Mathieu-Daudé
2023-01-23 16:23         ` Peter Maydell
2023-01-23 16:41           ` Philippe Mathieu-Daudé
2023-01-25 14:50             ` Evgeny Iakovlev

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