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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "WANG Xuerui" <git@xen0n.name>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL v2 06/15] target/loongarch: Enable the disassembler for host tcg
Date: Mon, 23 Jan 2023 16:04:58 -1000	[thread overview]
Message-ID: <20230124020507.3732200-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230124020507.3732200-1-richard.henderson@linaro.org>

Reuse the decodetree based disassembler from
target/loongarch/ for tcg/loongarch64/.

The generation of decode-insns.c.inc into ./libcommon.fa.p/ could
eventually result in conflict, if any other host requires the same
trick, but this is good enough for now.

Reviewed-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 disas.c                      | 2 ++
 target/loongarch/meson.build | 3 ++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/disas.c b/disas.c
index 3b31315f40..b087c12c47 100644
--- a/disas.c
+++ b/disas.c
@@ -198,6 +198,8 @@ static void initialize_debug_host(CPUDebug *s)
     s->info.cap_insn_split = 6;
 #elif defined(__hppa__)
     s->info.print_insn = print_insn_hppa;
+#elif defined(__loongarch__)
+    s->info.print_insn = print_insn_loongarch;
 #endif
 }
 
diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
index 6376f9e84b..690633969f 100644
--- a/target/loongarch/meson.build
+++ b/target/loongarch/meson.build
@@ -3,7 +3,6 @@ gen = decodetree.process('insns.decode')
 loongarch_ss = ss.source_set()
 loongarch_ss.add(files(
   'cpu.c',
-  'disas.c',
 ))
 loongarch_tcg_ss = ss.source_set()
 loongarch_tcg_ss.add(gen)
@@ -24,6 +23,8 @@ loongarch_softmmu_ss.add(files(
   'iocsr_helper.c',
 ))
 
+common_ss.add(when: 'CONFIG_LOONGARCH_DIS', if_true: [files('disas.c'), gen])
+
 loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
 
 target_arch += {'loongarch': loongarch_ss}
-- 
2.34.1



  parent reply	other threads:[~2023-01-24  2:05 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-24  2:04 [PULL v2 00/15] tcg patch queue Richard Henderson
2023-01-24  2:04 ` [PULL v2 01/15] tcg: Avoid recursion in tcg_gen_mulu2_i32 Richard Henderson
2023-01-24  2:04 ` [PULL v2 02/15] tcg/arm: Use register pair allocation for qemu_{ld, st}_i64 Richard Henderson
2023-01-24  2:04 ` [PULL v2 03/15] common-user/host/ppc: Implement safe-syscall.inc.S Richard Henderson
2023-01-24  2:04 ` [PULL v2 04/15] linux-user: Implment host/ppc/host-signal.h Richard Henderson
2023-01-24  2:04 ` [PULL v2 05/15] tcg: Mark tcg helpers noinline to avoid an issue with LTO Richard Henderson
2023-01-24  2:04 ` Richard Henderson [this message]
2023-01-24  2:04 ` [PULL v2 07/15] target/loongarch: Disassemble jirl properly Richard Henderson
2023-01-24  2:05 ` [PULL v2 08/15] target/loongarch: Disassemble pcadd* addresses Richard Henderson
2023-01-24  2:05 ` [PULL v2 09/15] tcg/loongarch64: Optimize immediate loading Richard Henderson
2023-01-24  2:05 ` [PULL v2 10/15] tcg/loongarch64: Update tcg-insn-defs.c.inc Richard Henderson
2023-01-24  2:05 ` [PULL v2 11/15] tcg/loongarch64: Introduce tcg_out_addi Richard Henderson
2023-01-24  2:05 ` [PULL v2 12/15] tcg/loongarch64: Improve setcond expansion Richard Henderson
2023-01-24  2:05 ` [PULL v2 13/15] tcg/loongarch64: Implement movcond Richard Henderson
2023-01-24  2:05 ` [PULL v2 14/15] tcg/loongarch64: Use tcg_pcrel_diff in tcg_out_ldst Richard Henderson
2023-01-24  2:05 ` [PULL v2 15/15] tcg/loongarch64: Reorg goto_tb implementation Richard Henderson
2023-02-03 12:42 ` [PULL v2 00/15] tcg patch queue Peter Maydell

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