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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 10/33] sbsa-ref: remove cortex-a76 from list of supported cpus
Date: Fri,  3 Feb 2023 14:29:04 +0000	[thread overview]
Message-ID: <20230203142927.834793-11-peter.maydell@linaro.org> (raw)
In-Reply-To: <20230203142927.834793-1-peter.maydell@linaro.org>

From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

Cortex-A76 supports 40bits of address space. sbsa-ref's memory
starts above this limit.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230126114416.2447685-1-marcin.juszkiewicz@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/sbsa-ref.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 8378441dbb1..f778cb6d097 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -146,7 +146,6 @@ static const int sbsa_ref_irqmap[] = {
 static const char * const valid_cpus[] = {
     ARM_CPU_TYPE_NAME("cortex-a57"),
     ARM_CPU_TYPE_NAME("cortex-a72"),
-    ARM_CPU_TYPE_NAME("cortex-a76"),
     ARM_CPU_TYPE_NAME("neoverse-n1"),
     ARM_CPU_TYPE_NAME("max"),
 };
-- 
2.34.1



  parent reply	other threads:[~2023-02-03 14:31 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-03 14:28 [PULL 00/33] target-arm queue Peter Maydell
2023-02-03 14:28 ` [PULL 01/33] hw/arm: Use TYPE_ARM_SMMUV3 Peter Maydell
2023-02-03 14:28 ` [PULL 02/33] target/arm: Fix physical address resolution for Stage2 Peter Maydell
2023-02-03 14:28 ` [PULL 03/33] hw/char/pl011: refactor FIFO depth handling code Peter Maydell
2023-02-03 14:28 ` [PULL 04/33] hw/char/pl011: add post_load hook for backwards-compatibility Peter Maydell
2023-02-03 14:28 ` [PULL 05/33] hw/char/pl011: implement a reset method Peter Maydell
2023-02-03 14:29 ` [PULL 06/33] hw/char/pl011: better handling of FIFO flags on LCR reset Peter Maydell
2023-02-03 14:29 ` [PULL 07/33] hvf: arm: Add support for GICv3 Peter Maydell
2023-02-03 14:29 ` [PULL 08/33] hw/arm/virt: Consolidate GIC finalize logic Peter Maydell
2023-02-03 14:29 ` [PULL 09/33] hw/arm/virt: Make accels in GIC finalize logic explicit Peter Maydell
2023-02-03 14:29 ` Peter Maydell [this message]
2023-02-03 14:29 ` [PULL 11/33] target/arm: Name AT_S1E1RP and AT_S1E1WP cpregs correctly Peter Maydell
2023-02-03 14:29 ` [PULL 12/33] target/arm: Correct syndrome for ATS12NSO* at Secure EL1 Peter Maydell
2023-02-03 14:29 ` [PULL 13/33] target/arm: Remove CP_ACCESS_TRAP_UNCATEGORIZED_{EL2, EL3} Peter Maydell
2023-02-03 14:29 ` [PULL 14/33] target/arm: Move do_coproc_insn() syndrome calculation earlier Peter Maydell
2023-02-03 14:29 ` [PULL 15/33] target/arm: All UNDEF-at-EL0 traps take priority over HSTR_EL2 traps Peter Maydell
2023-02-03 14:29 ` [PULL 16/33] target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1 Peter Maydell
2023-02-03 14:29 ` [PULL 17/33] target/arm: Disable HSTR_EL2 traps if EL2 is not enabled Peter Maydell
2023-02-03 14:29 ` [PULL 18/33] target/arm: Define the FEAT_FGT registers Peter Maydell
2023-02-03 14:29 ` [PULL 19/33] target/arm: Implement FGT trapping infrastructure Peter Maydell
2023-02-03 14:29 ` [PULL 20/33] target/arm: Mark up sysregs for HFGRTR bits 0..11 Peter Maydell
2023-02-03 14:29 ` [PULL 21/33] target/arm: Mark up sysregs for HFGRTR bits 12..23 Peter Maydell
2023-02-03 14:29 ` [PULL 22/33] target/arm: Mark up sysregs for HFGRTR bits 24..35 Peter Maydell
2023-02-03 14:29 ` [PULL 23/33] target/arm: Mark up sysregs for HFGRTR bits 36..63 Peter Maydell
2023-02-03 14:29 ` [PULL 24/33] target/arm: Mark up sysregs for HDFGRTR bits 0..11 Peter Maydell
2023-02-03 14:29 ` [PULL 25/33] target/arm: Mark up sysregs for HDFGRTR bits 12..63 Peter Maydell
2023-02-03 14:29 ` [PULL 26/33] target/arm: Mark up sysregs for HFGITR bits 0..11 Peter Maydell
2023-02-03 14:29 ` [PULL 27/33] target/arm: Mark up sysregs for HFGITR bits 12..17 Peter Maydell
2023-02-03 14:29 ` [PULL 28/33] target/arm: Mark up sysregs for HFGITR bits 18..47 Peter Maydell
2023-02-03 14:29 ` [PULL 29/33] target/arm: Mark up sysregs for HFGITR bits 48..63 Peter Maydell
2023-02-03 14:29 ` [PULL 30/33] target/arm: Implement the HFGITR_EL2.ERET trap Peter Maydell
2023-02-03 14:29 ` [PULL 31/33] target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 traps Peter Maydell
2023-02-03 14:29 ` [PULL 32/33] target/arm: Implement MDCR_EL2.TDCC and MDCR_EL3.TDCC traps Peter Maydell
2023-02-03 14:29 ` [PULL 33/33] target/arm: Enable FEAT_FGT on '-cpu max' Peter Maydell
2023-02-03 18:54 ` [PULL 00/33] target-arm queue Peter Maydell

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