From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, "Markus Armbruster" <armbru@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
qemu-riscv@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Peter Maydell" <peter.maydell@linaro.org>
Subject: [PATCH 14/19] hw/microblaze: Set QDev properties using QDev API
Date: Fri, 3 Feb 2023 19:09:09 +0100 [thread overview]
Message-ID: <20230203180914.49112-15-philmd@linaro.org> (raw)
In-Reply-To: <20230203180914.49112-1-philmd@linaro.org>
No need to use the low-level QOM API when an object
inherits from QDev. Directly use the QDev API to set
its properties.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/microblaze/petalogix_ml605_mmu.c | 40 +++++++++++-------------
hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
hw/microblaze/xlnx-zynqmp-pmu.c | 40 ++++++++++--------------
3 files changed, 35 insertions(+), 47 deletions(-)
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index a24fadddca..c8cc7d2375 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -71,9 +71,9 @@ petalogix_ml605_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
MemoryRegion *address_space_mem = get_system_memory();
- DeviceState *dev, *dma, *eth0;
+ DeviceState *cpu, *dev, *dma, *eth0;
Object *ds, *cs;
- MicroBlazeCPU *cpu;
+ MicroBlazeCPU *mbcpu;
SysBusDevice *busdev;
DriveInfo *dinfo;
int i;
@@ -82,16 +82,16 @@ petalogix_ml605_init(MachineState *machine)
qemu_irq irq[32];
/* init CPUs */
- cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
- object_property_set_str(OBJECT(cpu), "version", "8.10.a", &error_abort);
+ cpu = DEVICE(object_new(TYPE_MICROBLAZE_CPU));
+ mbcpu = MICROBLAZE_CPU(cpu);
+ qdev_prop_set_string(cpu, "version", "8.10.a");
/* Use FPU but don't use floating point conversion and square
* root instructions
*/
- object_property_set_int(OBJECT(cpu), "use-fpu", 1, &error_abort);
- object_property_set_bool(OBJECT(cpu), "dcache-writeback", true,
- &error_abort);
- object_property_set_bool(OBJECT(cpu), "endianness", true, &error_abort);
- qdev_realize(DEVICE(cpu), NULL, &error_abort);
+ qdev_prop_set_uint8(cpu, "use-fpu", 1);
+ qdev_prop_set_bit(cpu, "dcache-writeback", true);
+ qdev_prop_set_bit(cpu, "endianness", true);
+ qdev_realize(cpu, NULL, &error_abort);
/* Attach emulated BRAM through the LMB. */
memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram",
@@ -115,7 +115,7 @@ petalogix_ml605_init(MachineState *machine)
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
- qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
+ qdev_get_gpio_in(cpu, MB_CPU_IRQ));
for (i = 0; i < 32; i++) {
irq[i] = qdev_get_gpio_in(dev, i);
}
@@ -148,10 +148,8 @@ petalogix_ml605_init(MachineState *machine)
qdev_set_nic_properties(eth0, &nd_table[0]);
qdev_prop_set_uint32(eth0, "rxmem", 0x1000);
qdev_prop_set_uint32(eth0, "txmem", 0x1000);
- object_property_set_link(OBJECT(eth0), "axistream-connected", ds,
- &error_abort);
- object_property_set_link(OBJECT(eth0), "axistream-control-connected", cs,
- &error_abort);
+ qdev_prop_set_link(eth0, "axistream-connected", ds);
+ qdev_prop_set_link(eth0, "axistream-control-connected", cs);
sysbus_realize_and_unref(SYS_BUS_DEVICE(eth0), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(eth0), 0, AXIENET_BASEADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(eth0), 0, irq[AXIENET_IRQ]);
@@ -161,10 +159,8 @@ petalogix_ml605_init(MachineState *machine)
cs = object_property_get_link(OBJECT(eth0),
"axistream-control-connected-target", NULL);
qdev_prop_set_uint32(dma, "freqhz", 100 * 1000000);
- object_property_set_link(OBJECT(dma), "axistream-connected", ds,
- &error_abort);
- object_property_set_link(OBJECT(dma), "axistream-control-connected", cs,
- &error_abort);
+ qdev_prop_set_link(dma, "axistream-connected", ds);
+ qdev_prop_set_link(dma, "axistream-control-connected", cs);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, AXIDMA_BASEADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(dma), 0, irq[AXIDMA_IRQ0]);
@@ -200,11 +196,11 @@ petalogix_ml605_init(MachineState *machine)
}
/* setup PVR to match kernel settings */
- cpu->cfg.pvr_regs[4] = 0xc56b8000;
- cpu->cfg.pvr_regs[5] = 0xc56be000;
- cpu->cfg.pvr_regs[10] = 0x0e000000; /* virtex 6 */
+ mbcpu->cfg.pvr_regs[4] = 0xc56b8000;
+ mbcpu->cfg.pvr_regs[5] = 0xc56be000;
+ mbcpu->cfg.pvr_regs[10] = 0x0e000000; /* virtex 6 */
- microblaze_load_kernel(cpu, MEMORY_BASEADDR, ram_size,
+ microblaze_load_kernel(mbcpu, MEMORY_BASEADDR, ram_size,
machine->initrd_filename,
BINARY_DEVICE_TREE_FILE,
NULL);
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index 9d959d1ad8..9df1dd72f3 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -70,7 +70,7 @@ petalogix_s3adsp1800_init(MachineState *machine)
MemoryRegion *sysmem = get_system_memory();
cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
- object_property_set_str(OBJECT(cpu), "version", "7.10.d", &error_abort);
+ qdev_prop_set_string(DEVICE(cpu), "version", "7.10.d");
qdev_realize(DEVICE(cpu), NULL, &error_abort);
/* Attach emulated BRAM through the LMB. */
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index 5a2016672a..e6f221d3eb 100644
--- a/hw/microblaze/xlnx-zynqmp-pmu.c
+++ b/hw/microblaze/xlnx-zynqmp-pmu.c
@@ -18,6 +18,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "exec/address-spaces.h"
+#include "hw/qdev-properties.h"
#include "hw/boards.h"
#include "cpu.h"
#include "boot.h"
@@ -76,35 +77,26 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj)
static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
{
XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
+ DeviceState *cpu = DEVICE(&s->cpu);
- object_property_set_uint(OBJECT(&s->cpu), "base-vectors",
- XLNX_ZYNQMP_PMU_ROM_ADDR, &error_abort);
- object_property_set_bool(OBJECT(&s->cpu), "use-stack-protection", true,
- &error_abort);
- object_property_set_uint(OBJECT(&s->cpu), "use-fpu", 0, &error_abort);
- object_property_set_uint(OBJECT(&s->cpu), "use-hw-mul", 0, &error_abort);
- object_property_set_bool(OBJECT(&s->cpu), "use-barrel", true,
- &error_abort);
- object_property_set_bool(OBJECT(&s->cpu), "use-msr-instr", true,
- &error_abort);
- object_property_set_bool(OBJECT(&s->cpu), "use-pcmp-instr", true,
- &error_abort);
- object_property_set_bool(OBJECT(&s->cpu), "use-mmu", false, &error_abort);
- object_property_set_bool(OBJECT(&s->cpu), "endianness", true,
- &error_abort);
- object_property_set_str(OBJECT(&s->cpu), "version", "8.40.b",
- &error_abort);
- object_property_set_uint(OBJECT(&s->cpu), "pvr", 0, &error_abort);
+ qdev_prop_set_uint32(cpu, "base-vectors", XLNX_ZYNQMP_PMU_ROM_ADDR);
+ qdev_prop_set_bit(cpu, "use-stack-protection", true);
+ qdev_prop_set_uint8(cpu, "use-fpu", 0);
+ qdev_prop_set_uint8(cpu, "use-hw-mul", 0);
+ qdev_prop_set_bit(cpu, "use-barrel", true);
+ qdev_prop_set_bit(cpu, "use-msr-instr", true);
+ qdev_prop_set_bit(cpu, "use-pcmp-instr", true);
+ qdev_prop_set_bit(cpu, "use-mmu", false);
+ qdev_prop_set_bit(cpu, "endianness", true);
+ qdev_prop_set_string(cpu, "version", "8.40.b");
+ qdev_prop_set_uint8(cpu, "pvr", 0);
if (!qdev_realize(DEVICE(&s->cpu), NULL, errp)) {
return;
}
- object_property_set_uint(OBJECT(&s->intc), "intc-intr-size", 0x10,
- &error_abort);
- object_property_set_uint(OBJECT(&s->intc), "intc-level-edge", 0x0,
- &error_abort);
- object_property_set_uint(OBJECT(&s->intc), "intc-positive", 0xffff,
- &error_abort);
+ qdev_prop_set_uint32(DEVICE(&s->intc), "intc-intr-size", 0x10);
+ qdev_prop_set_uint32(DEVICE(&s->intc), "intc-level-edge", 0x0);
+ qdev_prop_set_uint32(DEVICE(&s->intc), "intc-positive", 0xffff);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->intc), errp)) {
return;
}
--
2.38.1
next prev parent reply other threads:[~2023-02-03 18:11 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-03 18:08 [PATCH 00/19] hw: Set QDev properties using QDev API (part 1/3) Philippe Mathieu-Daudé
2023-02-03 18:08 ` [PATCH 01/19] NOTFORMERGE scripts/coccinelle: Add qom-qdev-prop.cocci Philippe Mathieu-Daudé
2023-02-03 18:08 ` [PATCH 02/19] hw/qdev: Introduce qdev_prop_set_link() Philippe Mathieu-Daudé
2023-02-05 22:53 ` Mark Cave-Ayland
2023-02-03 18:08 ` [PATCH 03/19] hw/acpi: Set QDev properties using QDev API Philippe Mathieu-Daudé
2023-03-01 14:07 ` Igor Mammedov
2023-02-03 18:08 ` [PATCH 04/19] hw/audio: " Philippe Mathieu-Daudé
2023-02-03 18:09 ` [RFC PATCH 05/19] hw/core/numa: " Philippe Mathieu-Daudé
2023-03-01 14:09 ` Igor Mammedov
2023-02-03 18:09 ` [PATCH 06/19] hw/core/gpio: " Philippe Mathieu-Daudé
2023-02-03 18:09 ` [RFC PATCH 07/19] hw/scsi: " Philippe Mathieu-Daudé
2023-03-01 14:13 ` Igor Mammedov
2023-02-03 18:09 ` [PATCH 08/19] hw/usb: " Philippe Mathieu-Daudé
2023-02-03 18:09 ` [PATCH 09/19] hw/virtio: " Philippe Mathieu-Daudé
2023-02-03 18:09 ` [PATCH 10/19] hw/avr: " Philippe Mathieu-Daudé
2023-02-03 18:09 ` [PATCH 11/19] hw/hppa: " Philippe Mathieu-Daudé
2023-02-03 18:09 ` [RFC PATCH 12/19] hw/i386: " Philippe Mathieu-Daudé
2023-02-04 13:23 ` Bernhard Beschow
2023-03-01 14:00 ` Igor Mammedov
2023-02-03 18:09 ` [PATCH 13/19] hw/m68k: " Philippe Mathieu-Daudé
2023-02-05 9:14 ` Thomas Huth
2023-02-03 18:09 ` Philippe Mathieu-Daudé [this message]
2023-02-03 18:09 ` [RFC PATCH 15/19] hw/mips: " Philippe Mathieu-Daudé
2023-02-03 18:09 ` [PATCH 16/19] hw/nios2: " Philippe Mathieu-Daudé
2023-02-03 18:09 ` [RFC PATCH 17/19] hw/riscv: " Philippe Mathieu-Daudé
2023-02-03 18:09 ` [PATCH 18/19] hw/rx: " Philippe Mathieu-Daudé
2023-02-06 13:01 ` Yoshinori Sato
2023-02-03 18:09 ` [PATCH 19/19] hw/sparc: " Philippe Mathieu-Daudé
2023-02-03 18:12 ` [PATCH 00/19] hw: Set QDev properties using QDev API (part 1/3) Philippe Mathieu-Daudé
2023-02-03 18:52 ` BALATON Zoltan
2023-03-01 13:42 ` Igor Mammedov
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