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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Alex Bennée" <alex.bennee@linaro.org>
Subject: [PULL 04/40] tcg: Handle dh_typecode_i128 with TCG_CALL_{RET, ARG}_NORMAL
Date: Sat,  4 Feb 2023 06:32:34 -1000	[thread overview]
Message-ID: <20230204163310.815536-5-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230204163310.815536-1-richard.henderson@linaro.org>

Many hosts pass and return 128-bit quantities like sequential
64-bit quantities.  Treat this just like we currently break
down 64-bit quantities for a 32-bit host.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/tcg.c | 37 +++++++++++++++++++++++++++++++++----
 1 file changed, 33 insertions(+), 4 deletions(-)

diff --git a/tcg/tcg.c b/tcg/tcg.c
index bc60fd0fe8..bc7198e5d0 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -707,11 +707,22 @@ static void init_call_layout(TCGHelperInfo *info)
     case dh_typecode_s64:
         info->nr_out = 64 / TCG_TARGET_REG_BITS;
         info->out_kind = TCG_CALL_RET_NORMAL;
+        assert(info->nr_out <= ARRAY_SIZE(tcg_target_call_oarg_regs));
+        break;
+    case dh_typecode_i128:
+        info->nr_out = 128 / TCG_TARGET_REG_BITS;
+        info->out_kind = TCG_CALL_RET_NORMAL; /* TODO */
+        switch (/* TODO */ TCG_CALL_RET_NORMAL) {
+        case TCG_CALL_RET_NORMAL:
+            assert(info->nr_out <= ARRAY_SIZE(tcg_target_call_oarg_regs));
+            break;
+        default:
+            qemu_build_not_reached();
+        }
         break;
     default:
         g_assert_not_reached();
     }
-    assert(info->nr_out <= ARRAY_SIZE(tcg_target_call_oarg_regs));
 
     /*
      * Parse and place function arguments.
@@ -733,6 +744,9 @@ static void init_call_layout(TCGHelperInfo *info)
         case dh_typecode_ptr:
             type = TCG_TYPE_PTR;
             break;
+        case dh_typecode_i128:
+            type = TCG_TYPE_I128;
+            break;
         default:
             g_assert_not_reached();
         }
@@ -772,6 +786,19 @@ static void init_call_layout(TCGHelperInfo *info)
             }
             break;
 
+        case TCG_TYPE_I128:
+            switch (/* TODO */ TCG_CALL_ARG_NORMAL) {
+            case TCG_CALL_ARG_EVEN:
+                layout_arg_even(&cum);
+                /* fall through */
+            case TCG_CALL_ARG_NORMAL:
+                layout_arg_normal_n(&cum, info, 128 / TCG_TARGET_REG_BITS);
+                break;
+            default:
+                qemu_build_not_reached();
+            }
+            break;
+
         default:
             g_assert_not_reached();
         }
@@ -1692,11 +1719,13 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args)
         op->args[pi++] = temp_arg(ret);
         break;
     case 2:
+    case 4:
         tcg_debug_assert(ret != NULL);
-        tcg_debug_assert(ret->base_type == ret->type + 1);
+        tcg_debug_assert(ret->base_type == ret->type + ctz32(n));
         tcg_debug_assert(ret->temp_subindex == 0);
-        op->args[pi++] = temp_arg(ret);
-        op->args[pi++] = temp_arg(ret + 1);
+        for (i = 0; i < n; ++i) {
+            op->args[pi++] = temp_arg(ret + i);
+        }
         break;
     default:
         g_assert_not_reached();
-- 
2.34.1



  parent reply	other threads:[~2023-02-04 16:36 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-04 16:32 [PULL 00/40] tcg patch queue Richard Henderson
2023-02-04 16:32 ` [PULL 01/40] accel/tcg: Test CPUJumpCache in tb_jmp_cache_clear_page Richard Henderson
2023-02-04 16:32 ` [PULL 02/40] tcg: Init temp_subindex in liveness_pass_2 Richard Henderson
2023-02-04 16:32 ` [PULL 03/40] tcg: Define TCG_TYPE_I128 and related helper macros Richard Henderson
2023-02-04 16:32 ` Richard Henderson [this message]
2023-02-04 16:32 ` [PULL 05/40] tcg: Allocate objects contiguously in temp_allocate_frame Richard Henderson
2023-02-04 16:32 ` [PULL 06/40] tcg: Introduce tcg_out_addi_ptr Richard Henderson
2023-02-04 16:32 ` [PULL 07/40] tcg: Add TCG_CALL_{RET,ARG}_BY_REF Richard Henderson
2023-02-04 16:32 ` [PULL 08/40] tcg: Introduce tcg_target_call_oarg_reg Richard Henderson
2023-02-04 16:32 ` [PULL 09/40] tcg: Add TCG_CALL_RET_BY_VEC Richard Henderson
2023-02-04 16:32 ` [PULL 10/40] include/qemu/int128: Use Int128 structure for TCI Richard Henderson
2023-02-04 16:32 ` [PULL 11/40] tcg/i386: Add TCG_TARGET_CALL_{RET,ARG}_I128 Richard Henderson
2023-02-04 16:32 ` [PULL 12/40] tcg/tci: Fix big-endian return register ordering Richard Henderson
2023-02-04 16:32 ` [PULL 13/40] tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128 Richard Henderson
2023-02-04 16:32 ` [PULL 14/40] tcg: " Richard Henderson
2023-02-04 16:32 ` [PULL 15/40] tcg: Add temp allocation for TCGv_i128 Richard Henderson
2023-02-04 16:32 ` [PULL 16/40] tcg: Add basic data movement " Richard Henderson
2023-02-04 16:32 ` [PULL 17/40] tcg: Add guest load/store primitives " Richard Henderson
2023-02-04 16:32 ` [PULL 18/40] tcg: Add tcg_gen_{non}atomic_cmpxchg_i128 Richard Henderson
2023-02-04 16:32 ` [PULL 19/40] tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64} Richard Henderson
2023-02-04 16:32 ` [PULL 20/40] target/arm: Use tcg_gen_atomic_cmpxchg_i128 for STXP Richard Henderson
2023-02-04 16:32 ` [PULL 21/40] target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASP Richard Henderson
2023-02-04 16:32 ` [PULL 22/40] target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX Richard Henderson
2023-02-04 16:32 ` [PULL 23/40] tests/tcg/s390x: Add div.c Richard Henderson
2023-02-04 16:32 ` [PULL 24/40] tests/tcg/s390x: Add clst.c Richard Henderson
2023-02-04 16:32 ` [PULL 25/40] tests/tcg/s390x: Add long-double.c Richard Henderson
2023-02-04 16:32 ` [PULL 26/40] tests/tcg/s390x: Add cdsg.c Richard Henderson
2023-02-04 16:32 ` [PULL 27/40] target/s390x: Use a single return for helper_divs32/u32 Richard Henderson
2023-02-04 16:32 ` [PULL 28/40] target/s390x: Use a single return for helper_divs64/u64 Richard Henderson
2023-02-04 16:32 ` [PULL 29/40] target/s390x: Use Int128 for return from CLST Richard Henderson
2023-02-04 16:33 ` [PULL 30/40] target/s390x: Use Int128 for return from CKSM Richard Henderson
2023-02-04 16:33 ` [PULL 31/40] target/s390x: Use Int128 for return from TRE Richard Henderson
2023-02-04 16:33 ` [PULL 32/40] target/s390x: Copy wout_x1 to wout_x1_P Richard Henderson
2023-02-04 16:33 ` [PULL 33/40] target/s390x: Use Int128 for returning float128 Richard Henderson
2023-02-04 16:33 ` [PULL 34/40] target/s390x: Use Int128 for passing float128 Richard Henderson
2023-02-04 16:33 ` [PULL 35/40] target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSG Richard Henderson
2023-02-04 16:33 ` [PULL 36/40] target/s390x: Implement CC_OP_NZ in gen_op_calc_cc Richard Henderson
2023-02-04 16:33 ` [PULL 37/40] target/i386: Split out gen_cmpxchg8b, gen_cmpxchg16b Richard Henderson
2023-02-04 16:33 ` [PULL 38/40] target/i386: Inline cmpxchg8b Richard Henderson
2023-02-04 16:33 ` [PULL 39/40] target/i386: Inline cmpxchg16b Richard Henderson
2023-02-04 16:33 ` [PULL 40/40] tcg/aarch64: Fix patching of LDR in tb_target_set_jmp_target Richard Henderson
2023-02-05 16:48 ` [PULL 00/40] tcg patch queue Peter Maydell

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