From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org,
Richard Henderson <richard.henderson@linaro.org>
Subject: [PULL 05/12] target/tricore: Fix RRPW_DEXTR
Date: Wed, 8 Feb 2023 10:14:15 +0100 [thread overview]
Message-ID: <20230208091422.1243084-6-kbastian@mail.uni-paderborn.de> (raw)
In-Reply-To: <20230208091422.1243084-1-kbastian@mail.uni-paderborn.de>
if we used const16 == 0 we would crash qemu with the error:
../tcg/tcg-op.c:196: tcg_gen_shri_i32: Assertion `arg2 >= 0 && arg2 < 32' failed
This whole instruction can be handled by 'tcg_gen_extract2_tl' which
takes care of this special case as well.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230202120432.1268-6-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
---
target/tricore/translate.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 6149d4f5c0..3b4ec530b1 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -8706,15 +8706,9 @@ static void decode_32Bit_opc(DisasContext *ctx)
r2 = MASK_OP_RRPW_S2(ctx->opcode);
r3 = MASK_OP_RRPW_D(ctx->opcode);
const16 = MASK_OP_RRPW_POS(ctx->opcode);
- if (r1 == r2) {
- tcg_gen_rotli_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], const16);
- } else {
- temp = tcg_temp_new();
- tcg_gen_shli_tl(temp, cpu_gpr_d[r1], const16);
- tcg_gen_shri_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], 32 - const16);
- tcg_gen_or_tl(cpu_gpr_d[r3], cpu_gpr_d[r3], temp);
- tcg_temp_free(temp);
- }
+
+ tcg_gen_extract2_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], cpu_gpr_d[r1],
+ 32 - const16);
break;
/* RRR Format */
case OPCM_32_RRR_COND_SELECT:
--
2.39.1
next prev parent reply other threads:[~2023-02-08 9:16 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-08 9:14 [PULL 00/12] tricore queue Bastian Koppelmann
2023-02-08 9:14 ` [PULL 01/12] target/tricore: Fix OPC2_32_RCRW_IMASK translation Bastian Koppelmann
2023-02-08 9:14 ` [PULL 02/12] tests/tcg/tricore: Add test for OPC2_32_RCRW_IMASK Bastian Koppelmann
2023-02-08 9:14 ` [PULL 03/12] target/tricore: Fix OPC2_32_RCRW_INSERT translation Bastian Koppelmann
2023-02-08 9:14 ` [PULL 04/12] tests/tcg/tricore: Add test for OPC2_32_RCRW_INSERT Bastian Koppelmann
2023-02-08 9:14 ` Bastian Koppelmann [this message]
2023-02-08 9:14 ` [PULL 06/12] tests/tcg/tricore: Add tests for RRPW_DEXTR Bastian Koppelmann
2023-02-08 9:14 ` [PULL 07/12] target/tricore: Fix OPC2_32_RRRR_DEXTR Bastian Koppelmann
2023-02-08 9:14 ` [PULL 08/12] tests/tcg/tricore: Add OPC2_32_RRRR_DEXTR tests Bastian Koppelmann
2023-02-08 9:14 ` [PULL 09/12] target/tricore: Fix OPC2_32_BO_LD_BU_PREINC Bastian Koppelmann
2023-02-08 9:14 ` [PULL 10/12] tests/tcg/tricore: Add LD.BU tests Bastian Koppelmann
2023-02-08 9:14 ` [PULL 11/12] target/tricore: Fix OPC1_16_SRO_LD_H translation Bastian Koppelmann
2023-02-08 9:14 ` [PULL 12/12] tests/tcg/tricore: Add test for ld.h Bastian Koppelmann
2023-02-09 11:23 ` [PULL 00/12] tricore queue Peter Maydell
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