From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Hervé Poussineau" <hpoussin@reactos.org>,
qemu-arm@nongnu.org,
"Elena Ufimtseva" <elena.ufimtseva@oracle.com>,
qemu-block@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Ani Sinha" <ani@anisinha.ca>, "John Snow" <jsnow@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Jagannathan Raman" <jag.raman@oracle.com>,
qemu-ppc@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Igor Mammedov" <imammedo@redhat.com>,
"John G Johnson" <john.g.johnson@oracle.com>,
"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v7 20/23] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4
Date: Sun, 12 Feb 2023 13:38:02 +0100 [thread overview]
Message-ID: <20230212123805.30799-21-shentey@gmail.com> (raw)
In-Reply-To: <20230212123805.30799-1-shentey@gmail.com>
Resolves duplicate code.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221022150508.26830-39-shentey@gmail.com>
---
hw/isa/piix.c | 78 ++++++++++++++++-----------------------------------
1 file changed, 24 insertions(+), 54 deletions(-)
diff --git a/hw/isa/piix.c b/hw/isa/piix.c
index 4b48fe6023..0177be6d6f 100644
--- a/hw/isa/piix.c
+++ b/hw/isa/piix.c
@@ -332,17 +332,11 @@ static const MemoryRegionOps rcr_ops = {
},
};
-static void pci_piix3_realize(PCIDevice *dev, Error **errp)
+static void pci_piix_realize(PCIDevice *dev, const char *uhci_type,
+ ISABus *isa_bus, Error **errp)
{
PIIXState *d = PIIX_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
- ISABus *isa_bus;
-
- isa_bus = isa_bus_new(DEVICE(d), pci_address_space(dev),
- pci_address_space_io(dev), errp);
- if (!isa_bus) {
- return;
- }
memory_region_init_io(&d->rcr_mem, OBJECT(dev), &rcr_ops, d,
"piix-reset-control", 1);
@@ -367,8 +361,7 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
/* USB */
if (d->has_usb) {
- object_initialize_child(OBJECT(dev), "uhci", &d->uhci,
- TYPE_PIIX3_USB_UHCI);
+ object_initialize_child(OBJECT(dev), "uhci", &d->uhci, uhci_type);
qdev_prop_set_int32(DEVICE(&d->uhci), "addr", dev->devfn + 2);
if (!qdev_realize(DEVICE(&d->uhci), BUS(pci_bus), errp)) {
return;
@@ -467,8 +460,15 @@ static void piix3_realize(PCIDevice *dev, Error **errp)
ERRP_GUARD();
PIIXState *piix3 = PIIX_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
+ ISABus *isa_bus;
+
+ isa_bus = isa_bus_new(DEVICE(dev), pci_address_space(dev),
+ pci_address_space_io(dev), errp);
+ if (!isa_bus) {
+ return;
+ }
- pci_piix3_realize(dev, errp);
+ pci_piix_realize(dev, TYPE_PIIX3_USB_UHCI, isa_bus, errp);
if (*errp) {
return;
}
@@ -496,8 +496,15 @@ static void piix3_xen_realize(PCIDevice *dev, Error **errp)
ERRP_GUARD();
PIIXState *piix3 = PIIX_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
+ ISABus *isa_bus;
- pci_piix3_realize(dev, errp);
+ isa_bus = isa_bus_new(DEVICE(dev), pci_address_space(dev),
+ pci_address_space_io(dev), errp);
+ if (!isa_bus) {
+ return;
+ }
+
+ pci_piix_realize(dev, TYPE_PIIX3_USB_UHCI, isa_bus, errp);
if (*errp) {
return;
}
@@ -533,6 +540,7 @@ static void piix4_request_i8259_irq(void *opaque, int irq, int level)
static void piix4_realize(PCIDevice *dev, Error **errp)
{
+ ERRP_GUARD();
PIIXState *s = PIIX_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
ISABus *isa_bus;
@@ -544,59 +552,21 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
return;
}
- memory_region_init_io(&s->rcr_mem, OBJECT(dev), &rcr_ops, s,
- "piix-reset-control", 1);
- memory_region_add_subregion_overlap(pci_address_space_io(dev),
- PIIX_RCR_IOPORT, &s->rcr_mem, 1);
-
/* initialize i8259 pic */
i8259_out_irq = qemu_allocate_irqs(piix4_request_i8259_irq, s, 1);
s->pic = i8259_init(isa_bus, *i8259_out_irq);
- /* initialize ISA irqs */
- isa_bus_irqs(isa_bus, s->pic);
+ pci_piix_realize(dev, TYPE_PIIX4_USB_UHCI, isa_bus, errp);
+ if (*errp) {
+ return;
+ }
/* initialize pit */
i8254_pit_init(isa_bus, 0x40, 0, NULL);
- /* DMA */
- i8257_dma_init(isa_bus, 0);
-
/* RTC */
- qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000);
- if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) {
- return;
- }
s->rtc.irq = s->pic[s->rtc.isairq];
- /* IDE */
- qdev_prop_set_int32(DEVICE(&s->ide), "addr", dev->devfn + 1);
- if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) {
- return;
- }
-
- /* USB */
- if (s->has_usb) {
- object_initialize_child(OBJECT(dev), "uhci", &s->uhci,
- TYPE_PIIX4_USB_UHCI);
- qdev_prop_set_int32(DEVICE(&s->uhci), "addr", dev->devfn + 2);
- if (!qdev_realize(DEVICE(&s->uhci), BUS(pci_bus), errp)) {
- return;
- }
- }
-
- /* ACPI controller */
- if (s->has_acpi) {
- object_initialize_child(OBJECT(s), "pm", &s->pm, TYPE_PIIX4_PM);
- qdev_prop_set_int32(DEVICE(&s->pm), "addr", dev->devfn + 3);
- qdev_prop_set_uint32(DEVICE(&s->pm), "smb_io_base", s->smb_io_base);
- qdev_prop_set_bit(DEVICE(&s->pm), "smm-enabled", s->smm_enabled);
- if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) {
- return;
- }
- qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->pic[9]);
- }
-
pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS);
}
--
2.39.1
next prev parent reply other threads:[~2023-02-12 12:46 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-12 12:37 [PATCH v7 00/23] Consolidate PIIX south bridges Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 01/23] hw/i386/pc: Create RTC controllers in " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 02/23] hw/i386/pc: No need for rtc_state to be an out-parameter Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 03/23] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 04/23] hw/isa/piix3: Create USB controller in host device Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 05/23] hw/isa/piix3: Create power management " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 06/23] hw/isa/piix3: Move ISA bus IRQ assignments into " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 07/23] hw/isa/piix3: Create IDE controller in " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 08/23] hw/isa/piix3: Wire up ACPI interrupt internally Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 09/23] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 10/23] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 11/23] hw/isa/piix3: Rename piix3_reset() " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 12/23] hw/isa/piix3: Drop the "3" from PIIX base class Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 13/23] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 14/23] hw/isa/piix4: Remove unused inbound ISA interrupt lines Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 15/23] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 16/23] hw/isa/piix4: Create the "intr" property during init() already Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 17/23] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 18/23] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 19/23] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2023-02-12 12:38 ` Bernhard Beschow [this message]
2023-02-12 12:38 ` [PATCH v7 21/23] hw/isa/piix: Rename functions to be shared for interrupt triggering Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 22/23] hw/isa/piix: Consolidate IRQ triggering Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 23/23] hw/isa/piix: Share PIIX3's base class with PIIX4 Bernhard Beschow
2023-02-23 17:25 ` [PATCH v7 00/23] Consolidate PIIX south bridges Bernhard Beschow
2023-03-01 22:19 ` Michael S. Tsirkin
2023-03-02 21:25 ` Bernhard Beschow
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230212123805.30799-21-shentey@gmail.com \
--to=shentey@gmail.com \
--cc=ani@anisinha.ca \
--cc=aurelien@aurel32.net \
--cc=eduardo@habkost.net \
--cc=elena.ufimtseva@oracle.com \
--cc=f4bug@amsat.org \
--cc=hpoussin@reactos.org \
--cc=imammedo@redhat.com \
--cc=jag.raman@oracle.com \
--cc=jiaxun.yang@flygoat.com \
--cc=john.g.johnson@oracle.com \
--cc=jsnow@redhat.com \
--cc=kraxel@redhat.com \
--cc=marcel.apfelbaum@gmail.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=philmd@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-block@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).