From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Hervé Poussineau" <hpoussin@reactos.org>,
qemu-arm@nongnu.org,
"Elena Ufimtseva" <elena.ufimtseva@oracle.com>,
qemu-block@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Ani Sinha" <ani@anisinha.ca>, "John Snow" <jsnow@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Jagannathan Raman" <jag.raman@oracle.com>,
qemu-ppc@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Igor Mammedov" <imammedo@redhat.com>,
"John G Johnson" <john.g.johnson@oracle.com>,
"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v7 22/23] hw/isa/piix: Consolidate IRQ triggering
Date: Sun, 12 Feb 2023 13:38:04 +0100 [thread overview]
Message-ID: <20230212123805.30799-23-shentey@gmail.com> (raw)
In-Reply-To: <20230212123805.30799-1-shentey@gmail.com>
Speeds up PIIX4 which resolves an old TODO.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221022150508.26830-41-shentey@gmail.com>
---
hw/isa/piix.c | 26 +++-----------------------
1 file changed, 3 insertions(+), 23 deletions(-)
diff --git a/hw/isa/piix.c b/hw/isa/piix.c
index b0f0b42dae..0c644dc6e6 100644
--- a/hw/isa/piix.c
+++ b/hw/isa/piix.c
@@ -84,27 +84,6 @@ static void piix_set_irq(void *opaque, int pirq, int level)
piix_set_irq_level(piix, pirq, level);
}
-static void piix4_set_irq(void *opaque, int irq_num, int level)
-{
- int i, pic_irq, pic_level;
- PIIXState *s = opaque;
- PCIBus *bus = pci_get_bus(&s->dev);
-
- /* now we change the pic irq level according to the piix irq mappings */
- /* XXX: optimize */
- pic_irq = s->dev.config[PIIX_PIRQCA + irq_num];
- if (pic_irq < ISA_NUM_IRQS) {
- /* The pic level is the logical OR of all the PCI irqs mapped to it. */
- pic_level = 0;
- for (i = 0; i < PIIX_NUM_PIRQS; i++) {
- if (pic_irq == s->dev.config[PIIX_PIRQCA + i]) {
- pic_level |= pci_bus_get_irq_level(bus, i);
- }
- }
- qemu_set_irq(s->pic[pic_irq], pic_level);
- }
-}
-
static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin)
{
PIIXState *piix3 = opaque;
@@ -240,7 +219,7 @@ static int piix4_post_load(void *opaque, int version_id)
s->rcr = 0;
}
- return 0;
+ return piix3_post_load(opaque, version_id);
}
static int piix3_pre_save(void *opaque)
@@ -567,7 +546,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
/* RTC */
s->rtc.irq = s->pic[s->rtc.isairq];
- pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS);
+ pci_bus_irqs(pci_bus, piix_set_irq, s, PIIX_NUM_PIRQS);
}
static void piix4_init(Object *obj)
@@ -585,6 +564,7 @@ static void piix4_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+ k->config_write = piix_write_config;
k->realize = piix4_realize;
k->vendor_id = PCI_VENDOR_ID_INTEL;
k->device_id = PCI_DEVICE_ID_INTEL_82371AB_0;
--
2.39.1
next prev parent reply other threads:[~2023-02-12 12:48 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-12 12:37 [PATCH v7 00/23] Consolidate PIIX south bridges Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 01/23] hw/i386/pc: Create RTC controllers in " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 02/23] hw/i386/pc: No need for rtc_state to be an out-parameter Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 03/23] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 04/23] hw/isa/piix3: Create USB controller in host device Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 05/23] hw/isa/piix3: Create power management " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 06/23] hw/isa/piix3: Move ISA bus IRQ assignments into " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 07/23] hw/isa/piix3: Create IDE controller in " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 08/23] hw/isa/piix3: Wire up ACPI interrupt internally Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 09/23] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 10/23] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 11/23] hw/isa/piix3: Rename piix3_reset() " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 12/23] hw/isa/piix3: Drop the "3" from PIIX base class Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 13/23] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 14/23] hw/isa/piix4: Remove unused inbound ISA interrupt lines Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 15/23] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 16/23] hw/isa/piix4: Create the "intr" property during init() already Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 17/23] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 18/23] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 19/23] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 20/23] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 21/23] hw/isa/piix: Rename functions to be shared for interrupt triggering Bernhard Beschow
2023-02-12 12:38 ` Bernhard Beschow [this message]
2023-02-12 12:38 ` [PATCH v7 23/23] hw/isa/piix: Share PIIX3's base class with PIIX4 Bernhard Beschow
2023-02-23 17:25 ` [PATCH v7 00/23] Consolidate PIIX south bridges Bernhard Beschow
2023-03-01 22:19 ` Michael S. Tsirkin
2023-03-02 21:25 ` Bernhard Beschow
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