From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Hervé Poussineau" <hpoussin@reactos.org>,
qemu-arm@nongnu.org,
"Elena Ufimtseva" <elena.ufimtseva@oracle.com>,
qemu-block@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Ani Sinha" <ani@anisinha.ca>, "John Snow" <jsnow@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Jagannathan Raman" <jag.raman@oracle.com>,
qemu-ppc@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Igor Mammedov" <imammedo@redhat.com>,
"John G Johnson" <john.g.johnson@oracle.com>,
"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v7 23/23] hw/isa/piix: Share PIIX3's base class with PIIX4
Date: Sun, 12 Feb 2023 13:38:05 +0100 [thread overview]
Message-ID: <20230212123805.30799-24-shentey@gmail.com> (raw)
In-Reply-To: <20230212123805.30799-1-shentey@gmail.com>
Having a common base class will allow for substituting PIIX3 with PIIX4
and vice versa. Moreover, it makes PIIX4 implement the
acpi-dev-aml-interface.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221022150508.26830-42-shentey@gmail.com>
---
hw/isa/piix.c | 48 ++++++++++++++++++++++--------------------------
1 file changed, 22 insertions(+), 26 deletions(-)
diff --git a/hw/isa/piix.c b/hw/isa/piix.c
index 0c644dc6e6..0c2d560b85 100644
--- a/hw/isa/piix.c
+++ b/hw/isa/piix.c
@@ -381,12 +381,11 @@ static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
qbus_build_aml(bus, scope);
}
-static void pci_piix3_init(Object *obj)
+static void pci_piix_init(Object *obj)
{
PIIXState *d = PIIX_PCI_DEVICE(obj);
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
- object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE);
}
static Property pci_piix_props[] = {
@@ -397,7 +396,7 @@ static Property pci_piix_props[] = {
DEFINE_PROP_END_OF_LIST(),
};
-static void pci_piix3_class_init(ObjectClass *klass, void *data)
+static void pci_piix_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
@@ -405,11 +404,8 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data)
dc->reset = piix_reset;
dc->desc = "ISA bridge";
- dc->vmsd = &vmstate_piix3;
dc->hotpluggable = false;
k->vendor_id = PCI_VENDOR_ID_INTEL;
- /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
- k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
k->class_id = PCI_CLASS_BRIDGE_ISA;
/*
* Reason: part of PIIX3 southbridge, needs to be wired up by
@@ -424,9 +420,9 @@ static const TypeInfo piix_pci_type_info = {
.name = TYPE_PIIX_PCI_DEVICE,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PIIXState),
- .instance_init = pci_piix3_init,
+ .instance_init = pci_piix_init,
.abstract = true,
- .class_init = pci_piix3_class_init,
+ .class_init = pci_piix_class_init,
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
{ TYPE_ACPI_DEV_AML_IF },
@@ -456,17 +452,29 @@ static void piix3_realize(PCIDevice *dev, Error **errp)
pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq);
}
+static void piix3_init(Object *obj)
+{
+ PIIXState *d = PIIX_PCI_DEVICE(obj);
+
+ object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE);
+}
+
static void piix3_class_init(ObjectClass *klass, void *data)
{
+ DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->config_write = piix_write_config;
k->realize = piix3_realize;
+ /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
+ k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
+ dc->vmsd = &vmstate_piix3;
}
static const TypeInfo piix3_info = {
.name = TYPE_PIIX3_DEVICE,
.parent = TYPE_PIIX_PCI_DEVICE,
+ .instance_init = piix3_init,
.class_init = piix3_class_init,
};
@@ -499,15 +507,20 @@ static void piix3_xen_realize(PCIDevice *dev, Error **errp)
static void piix3_xen_class_init(ObjectClass *klass, void *data)
{
+ DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->config_write = piix3_write_config_xen;
k->realize = piix3_xen_realize;
+ /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
+ k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
+ dc->vmsd = &vmstate_piix3;
}
static const TypeInfo piix3_xen_info = {
.name = TYPE_PIIX3_XEN_DEVICE,
.parent = TYPE_PIIX_PCI_DEVICE,
+ .instance_init = piix3_init,
.class_init = piix3_xen_class_init,
};
@@ -555,7 +568,6 @@ static void piix4_init(Object *obj)
qdev_init_gpio_out_named(DEVICE(obj), &s->cpu_intr, "intr", 1);
- object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC);
object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE);
}
@@ -566,31 +578,15 @@ static void piix4_class_init(ObjectClass *klass, void *data)
k->config_write = piix_write_config;
k->realize = piix4_realize;
- k->vendor_id = PCI_VENDOR_ID_INTEL;
k->device_id = PCI_DEVICE_ID_INTEL_82371AB_0;
- k->class_id = PCI_CLASS_BRIDGE_ISA;
- dc->reset = piix_reset;
- dc->desc = "ISA bridge";
dc->vmsd = &vmstate_piix4;
- /*
- * Reason: part of PIIX4 southbridge, needs to be wired up,
- * e.g. by mips_malta_init()
- */
- dc->user_creatable = false;
- dc->hotpluggable = false;
- device_class_set_props(dc, pci_piix_props);
}
static const TypeInfo piix4_info = {
.name = TYPE_PIIX4_PCI_DEVICE,
- .parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(PIIXState),
+ .parent = TYPE_PIIX_PCI_DEVICE,
.instance_init = piix4_init,
.class_init = piix4_class_init,
- .interfaces = (InterfaceInfo[]) {
- { INTERFACE_CONVENTIONAL_PCI_DEVICE },
- { },
- },
};
static void piix3_register_types(void)
--
2.39.1
next prev parent reply other threads:[~2023-02-12 12:47 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-12 12:37 [PATCH v7 00/23] Consolidate PIIX south bridges Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 01/23] hw/i386/pc: Create RTC controllers in " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 02/23] hw/i386/pc: No need for rtc_state to be an out-parameter Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 03/23] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 04/23] hw/isa/piix3: Create USB controller in host device Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 05/23] hw/isa/piix3: Create power management " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 06/23] hw/isa/piix3: Move ISA bus IRQ assignments into " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 07/23] hw/isa/piix3: Create IDE controller in " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 08/23] hw/isa/piix3: Wire up ACPI interrupt internally Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 09/23] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 10/23] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 11/23] hw/isa/piix3: Rename piix3_reset() " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 12/23] hw/isa/piix3: Drop the "3" from PIIX base class Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 13/23] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 14/23] hw/isa/piix4: Remove unused inbound ISA interrupt lines Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 15/23] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 16/23] hw/isa/piix4: Create the "intr" property during init() already Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 17/23] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 18/23] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 19/23] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 20/23] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 21/23] hw/isa/piix: Rename functions to be shared for interrupt triggering Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 22/23] hw/isa/piix: Consolidate IRQ triggering Bernhard Beschow
2023-02-12 12:38 ` Bernhard Beschow [this message]
2023-02-23 17:25 ` [PATCH v7 00/23] Consolidate PIIX south bridges Bernhard Beschow
2023-03-01 22:19 ` Michael S. Tsirkin
2023-03-02 21:25 ` Bernhard Beschow
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