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From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Hervé Poussineau" <hpoussin@reactos.org>,
	qemu-arm@nongnu.org,
	"Elena Ufimtseva" <elena.ufimtseva@oracle.com>,
	qemu-block@nongnu.org,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Gerd Hoffmann" <kraxel@redhat.com>,
	"Ani Sinha" <ani@anisinha.ca>, "John Snow" <jsnow@redhat.com>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Jagannathan Raman" <jag.raman@oracle.com>,
	qemu-ppc@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"John G Johnson" <john.g.johnson@oracle.com>,
	"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v7 07/23] hw/isa/piix3: Create IDE controller in host device
Date: Sun, 12 Feb 2023 13:37:49 +0100	[thread overview]
Message-ID: <20230212123805.30799-8-shentey@gmail.com> (raw)
In-Reply-To: <20230212123805.30799-1-shentey@gmail.com>

Now that PIIX3 contains the new TYPE_ISA_PIC, it is possible to
instantiate PIIX3 IDE in the PIIX3 southbridge. PIIX3 IDE wires up its
interrupts to the ISA bus in its realize method which requires the
interrupt controller to provide fully populated qemu_irqs. This is the
case for TYPE_ISA_PIC even though the virtualization technology isn't
known yet.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221022150508.26830-17-shentey@gmail.com>
---
 include/hw/southbridge/piix.h |  2 ++
 hw/i386/pc_piix.c             | 16 +++++++---------
 hw/isa/piix3.c                |  8 ++++++++
 hw/i386/Kconfig               |  1 -
 hw/isa/Kconfig                |  1 +
 5 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index b1eaab1d95..f84a5d15cf 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -15,6 +15,7 @@
 #include "hw/pci/pci_device.h"
 #include "qom/object.h"
 #include "hw/acpi/piix4.h"
+#include "hw/ide/pci.h"
 #include "hw/rtc/mc146818rtc.h"
 #include "hw/usb/hcd-uhci.h"
 
@@ -56,6 +57,7 @@ struct PIIXState {
     int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS];
 
     RTCState rtc;
+    PCIIDEState ide;
     UHCIState uhci;
     PIIX4PMState pm;
 
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index dbddc3d060..bd66a5682b 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -41,7 +41,6 @@
 #include "hw/usb.h"
 #include "net/net.h"
 #include "hw/ide/pci.h"
-#include "hw/ide/piix.h"
 #include "hw/irq.h"
 #include "sysemu/kvm.h"
 #include "hw/kvm/clock.h"
@@ -98,7 +97,6 @@ static void pc_init1(MachineState *machine,
     PCIBus *pci_bus;
     ISABus *isa_bus;
     Object *piix4_pm;
-    int piix3_devfn = -1;
     qemu_irq smi_irq;
     GSIState *gsi_state;
     BusState *idebus[MAX_IDE_BUS];
@@ -219,6 +217,7 @@ static void pc_init1(MachineState *machine,
     gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
 
     if (pcmc->pci_enabled) {
+        DeviceState *dev;
         PIIX3State *piix3;
         PCIDevice *pci_dev;
         const char *type = xen_enabled() ? TYPE_PIIX3_XEN_DEVICE
@@ -249,11 +248,14 @@ static void pc_init1(MachineState *machine,
         piix3->pic = x86ms->gsi;
         pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
 
-        piix3_devfn = piix3->dev.devfn;
         isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));
         rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
                                                              "rtc"));
         piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
+        dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
+        pci_ide_create_devs(PCI_DEVICE(dev));
+        idebus[0] = qdev_get_child_bus(dev, "ide.0");
+        idebus[1] = qdev_get_child_bus(dev, "ide.1");
     } else {
         pci_bus = NULL;
         piix4_pm = NULL;
@@ -267,6 +269,8 @@ static void pc_init1(MachineState *machine,
 
         i8257_dma_init(isa_bus, 0);
         pcms->hpet_enabled = false;
+        idebus[0] = NULL;
+        idebus[1] = NULL;
     }
 
     if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
@@ -295,12 +299,6 @@ static void pc_init1(MachineState *machine,
     pc_nic_init(pcmc, isa_bus, pci_bus);
 
     if (pcmc->pci_enabled) {
-        PCIDevice *dev;
-
-        dev = pci_create_simple(pci_bus, piix3_devfn + 1, TYPE_PIIX3_IDE);
-        pci_ide_create_devs(dev);
-        idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
-        idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
         pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
     }
 #ifdef CONFIG_IDE_ISA
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 007225a96e..dd8b712085 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -29,6 +29,7 @@
 #include "hw/southbridge/piix.h"
 #include "hw/irq.h"
 #include "hw/qdev-properties.h"
+#include "hw/ide/piix.h"
 #include "hw/isa/isa.h"
 #include "hw/xen/xen.h"
 #include "sysemu/runstate.h"
@@ -312,6 +313,12 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
         return;
     }
 
+    /* IDE */
+    qdev_prop_set_int32(DEVICE(&d->ide), "addr", dev->devfn + 1);
+    if (!qdev_realize(DEVICE(&d->ide), BUS(pci_bus), errp)) {
+        return;
+    }
+
     /* USB */
     if (d->has_usb) {
         object_initialize_child(OBJECT(dev), "uhci", &d->uhci,
@@ -360,6 +367,7 @@ static void pci_piix3_init(Object *obj)
     PIIX3State *d = PIIX3_PCI_DEVICE(obj);
 
     object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
+    object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE);
 }
 
 static Property pci_piix3_props[] = {
diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig
index 1bf47b0b0b..408301fd8d 100644
--- a/hw/i386/Kconfig
+++ b/hw/i386/Kconfig
@@ -74,7 +74,6 @@ config I440FX
     select PC_ACPI
     select PCI_I440FX
     select PIIX3
-    select IDE_PIIX
     select DIMM
     select SMBIOS
     select FW_CFG_DMA
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index cf79580384..17ddb25afc 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -35,6 +35,7 @@ config PIIX3
     bool
     select ACPI_PIIX4
     select I8257
+    select IDE_PIIX
     select ISA_BUS
     select MC146818RTC
     select USB_UHCI
-- 
2.39.1



  parent reply	other threads:[~2023-02-12 12:41 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-12 12:37 [PATCH v7 00/23] Consolidate PIIX south bridges Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 01/23] hw/i386/pc: Create RTC controllers in " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 02/23] hw/i386/pc: No need for rtc_state to be an out-parameter Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 03/23] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 04/23] hw/isa/piix3: Create USB controller in host device Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 05/23] hw/isa/piix3: Create power management " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 06/23] hw/isa/piix3: Move ISA bus IRQ assignments into " Bernhard Beschow
2023-02-12 12:37 ` Bernhard Beschow [this message]
2023-02-12 12:37 ` [PATCH v7 08/23] hw/isa/piix3: Wire up ACPI interrupt internally Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 09/23] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 10/23] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 11/23] hw/isa/piix3: Rename piix3_reset() " Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 12/23] hw/isa/piix3: Drop the "3" from PIIX base class Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 13/23] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 14/23] hw/isa/piix4: Remove unused inbound ISA interrupt lines Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 15/23] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 16/23] hw/isa/piix4: Create the "intr" property during init() already Bernhard Beschow
2023-02-12 12:37 ` [PATCH v7 17/23] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 18/23] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 19/23] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 20/23] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 21/23] hw/isa/piix: Rename functions to be shared for interrupt triggering Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 22/23] hw/isa/piix: Consolidate IRQ triggering Bernhard Beschow
2023-02-12 12:38 ` [PATCH v7 23/23] hw/isa/piix: Share PIIX3's base class with PIIX4 Bernhard Beschow
2023-02-23 17:25 ` [PATCH v7 00/23] Consolidate PIIX south bridges Bernhard Beschow
2023-03-01 22:19   ` Michael S. Tsirkin
2023-03-02 21:25     ` Bernhard Beschow

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