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From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Ani Sinha <ani@anisinha.ca>,
	Eduardo Habkost <eduardo@habkost.net>,
	Igor Mammedov <imammedo@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Laurent Vivier <lvivier@redhat.com>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
	Sunil Muthuswamy <sunilmut@microsoft.com>,
	Thomas Huth <thuth@redhat.com>,
	Bernhard Beschow <shentey@gmail.com>
Subject: [PATCH 01/12] hw/i386/ich9: Rename Q35_MASK to ICH9_MASK
Date: Mon, 13 Feb 2023 18:30:22 +0100	[thread overview]
Message-ID: <20230213173033.98762-2-shentey@gmail.com> (raw)
In-Reply-To: <20230213173033.98762-1-shentey@gmail.com>

The Q35_MASK macro is already defined by TYPE_Q35_HOST_DEVICE, so let
TYPE_ICH9_LPC_DEVICE have its own one to prevent potential name clash.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
---
 include/hw/i386/ich9.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index 222781e8b9..36e0ccd16a 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -75,7 +75,7 @@ struct ICH9LPCState {
     qemu_irq gsi[GSI_NUM_PINS];
 };
 
-#define Q35_MASK(bit, ms_bit, ls_bit) \
+#define ICH9_MASK(bit, ms_bit, ls_bit) \
 ((uint##bit##_t)(((1ULL << ((ms_bit) + 1)) - 1) & ~((1ULL << ls_bit) - 1)))
 
 /* ICH9: Chipset Configuration Registers */
@@ -137,13 +137,13 @@ struct ICH9LPCState {
 #define ICH9_LPC_NB_PIRQS                       8       /* PCI A-H */
 
 #define ICH9_LPC_PMBASE                         0x40
-#define ICH9_LPC_PMBASE_BASE_ADDRESS_MASK       Q35_MASK(32, 15, 7)
+#define ICH9_LPC_PMBASE_BASE_ADDRESS_MASK       ICH9_MASK(32, 15, 7)
 #define ICH9_LPC_PMBASE_RTE                     0x1
 #define ICH9_LPC_PMBASE_DEFAULT                 0x1
 
 #define ICH9_LPC_ACPI_CTRL                      0x44
 #define ICH9_LPC_ACPI_CTRL_ACPI_EN              0x80
-#define ICH9_LPC_ACPI_CTRL_SCI_IRQ_SEL_MASK     Q35_MASK(8, 2, 0)
+#define ICH9_LPC_ACPI_CTRL_SCI_IRQ_SEL_MASK     ICH9_MASK(8, 2, 0)
 #define ICH9_LPC_ACPI_CTRL_9                    0x0
 #define ICH9_LPC_ACPI_CTRL_10                   0x1
 #define ICH9_LPC_ACPI_CTRL_11                   0x2
@@ -162,7 +162,7 @@ struct ICH9LPCState {
 #define ICH9_LPC_PIRQH_ROUT                     0x6b
 
 #define ICH9_LPC_PIRQ_ROUT_IRQEN                0x80
-#define ICH9_LPC_PIRQ_ROUT_MASK                 Q35_MASK(8, 3, 0)
+#define ICH9_LPC_PIRQ_ROUT_MASK                 ICH9_MASK(8, 3, 0)
 #define ICH9_LPC_PIRQ_ROUT_DEFAULT              0x80
 
 #define ICH9_LPC_GEN_PMCON_1                    0xa0
@@ -172,7 +172,7 @@ struct ICH9LPCState {
 #define ICH9_LPC_GEN_PMCON_LOCK                 0xa6
 
 #define ICH9_LPC_RCBA                           0xf0
-#define ICH9_LPC_RCBA_BA_MASK                   Q35_MASK(32, 31, 14)
+#define ICH9_LPC_RCBA_BA_MASK                   ICH9_MASK(32, 31, 14)
 #define ICH9_LPC_RCBA_EN                        0x1
 #define ICH9_LPC_RCBA_DEFAULT                   0x0
 
-- 
2.39.1



  reply	other threads:[~2023-02-13 17:32 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-13 17:30 [PATCH 00/12] ICH9 cleanup Bernhard Beschow
2023-02-13 17:30 ` Bernhard Beschow [this message]
2023-02-27 11:51   ` [PATCH 01/12] hw/i386/ich9: Rename Q35_MASK to ICH9_MASK Philippe Mathieu-Daudé
2023-02-13 17:30 ` [PATCH 02/12] hw/isa/lpc_ich9: Unexport PIRQ functions Bernhard Beschow
2023-02-27 11:51   ` Philippe Mathieu-Daudé
2023-02-13 17:30 ` [PATCH 03/12] hw/isa/lpc_ich9: Eliminate ICH9LPCState::isa_bus Bernhard Beschow
2023-02-27 11:51   ` Philippe Mathieu-Daudé
2023-02-13 17:30 ` [PATCH 04/12] hw/i2c/smbus_ich9: Move ich9_smb_set_irq() in front of ich9_smbus_realize() Bernhard Beschow
2023-02-27 11:52   ` Philippe Mathieu-Daudé
2023-02-13 17:30 ` [PATCH 05/12] hw/i2c/smbus_ich9: Inline ich9_smb_init() and remove it Bernhard Beschow
2023-02-18 20:25   ` Corey Minyard
2023-02-19 13:45     ` Philippe Mathieu-Daudé
2023-02-19 14:21       ` Corey Minyard
2023-02-27 11:53         ` Philippe Mathieu-Daudé
2023-02-27 19:34           ` Corey Minyard
2023-02-13 17:30 ` [PATCH 06/12] hw/i386/pc_q35: Allow for setting properties before realizing TYPE_ICH9_LPC_DEVICE Bernhard Beschow
2023-02-27 11:53   ` Philippe Mathieu-Daudé
2023-02-13 17:30 ` [PATCH 07/12] hw/isa/lpc_ich9: Connect pm stuff to lpc internally Bernhard Beschow
2023-02-27 11:55   ` Philippe Mathieu-Daudé
2023-02-13 17:30 ` [PATCH 08/12] hw/isa/lpc_ich9: Remove redundant ich9_lpc_reset() invocation Bernhard Beschow
2023-02-27 11:55   ` Philippe Mathieu-Daudé
2023-02-13 17:30 ` [PATCH 09/12] hw/i386/ich9: Remove redundant GSI_NUM_PINS Bernhard Beschow
2023-02-27 11:56   ` Philippe Mathieu-Daudé
2023-02-13 17:30 ` [PATCH 10/12] hw: Move ioapic*.h to intc/ Bernhard Beschow
2023-02-27 12:07   ` Philippe Mathieu-Daudé
2023-02-13 17:30 ` [PATCH 11/12] hw/i386/ich9: Clean up includes Bernhard Beschow
2023-02-27 12:09   ` Philippe Mathieu-Daudé
2023-02-13 17:30 ` [PATCH 12/12] hw: Move ich9.h to southbridge/ Bernhard Beschow
2023-02-27 11:56   ` Philippe Mathieu-Daudé
2023-02-27 12:22   ` Philippe Mathieu-Daudé
2023-03-01 21:31     ` Michael S. Tsirkin

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