From: Fabiano Rosas <farosas@suse.de>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Claudio Fontana" <cfontana@suse.de>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Alexander Graf" <agraf@csgraf.de>,
"Cornelia Huck" <cohuck@redhat.com>
Subject: [PATCH RESEND v5 09/28] target/arm: move translate modules to tcg/
Date: Mon, 13 Feb 2023 17:29:08 -0300 [thread overview]
Message-ID: <20230213202927.28992-10-farosas@suse.de> (raw)
In-Reply-To: <20230213202927.28992-1-farosas@suse.de>
Introduce the target/arm/tcg directory. Its purpose is to hold the TCG
code that is selected by CONFIG_TCG.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
MAINTAINERS | 1 +
target/arm/meson.build | 30 ++++-------------------
target/arm/{ => tcg}/a32-uncond.decode | 0
target/arm/{ => tcg}/a32.decode | 0
target/arm/{ => tcg}/m-nocp.decode | 0
target/arm/tcg/meson.build | 32 +++++++++++++++++++++++++
target/arm/{ => tcg}/mve.decode | 0
target/arm/{ => tcg}/neon-dp.decode | 0
target/arm/{ => tcg}/neon-ls.decode | 0
target/arm/{ => tcg}/neon-shared.decode | 0
target/arm/{ => tcg}/sme-fa64.decode | 0
target/arm/{ => tcg}/sme.decode | 0
target/arm/{ => tcg}/sve.decode | 0
target/arm/{ => tcg}/t16.decode | 0
target/arm/{ => tcg}/t32.decode | 0
target/arm/{ => tcg}/translate-a64.c | 0
target/arm/{ => tcg}/translate-a64.h | 0
target/arm/{ => tcg}/translate-m-nocp.c | 0
target/arm/{ => tcg}/translate-mve.c | 0
target/arm/{ => tcg}/translate-neon.c | 0
target/arm/{ => tcg}/translate-sme.c | 0
target/arm/{ => tcg}/translate-sve.c | 0
target/arm/{ => tcg}/translate-vfp.c | 0
target/arm/{ => tcg}/translate.c | 0
target/arm/{ => tcg}/translate.h | 0
target/arm/{ => tcg}/vfp-uncond.decode | 0
target/arm/{ => tcg}/vfp.decode | 0
27 files changed, 37 insertions(+), 26 deletions(-)
rename target/arm/{ => tcg}/a32-uncond.decode (100%)
rename target/arm/{ => tcg}/a32.decode (100%)
rename target/arm/{ => tcg}/m-nocp.decode (100%)
create mode 100644 target/arm/tcg/meson.build
rename target/arm/{ => tcg}/mve.decode (100%)
rename target/arm/{ => tcg}/neon-dp.decode (100%)
rename target/arm/{ => tcg}/neon-ls.decode (100%)
rename target/arm/{ => tcg}/neon-shared.decode (100%)
rename target/arm/{ => tcg}/sme-fa64.decode (100%)
rename target/arm/{ => tcg}/sme.decode (100%)
rename target/arm/{ => tcg}/sve.decode (100%)
rename target/arm/{ => tcg}/t16.decode (100%)
rename target/arm/{ => tcg}/t32.decode (100%)
rename target/arm/{ => tcg}/translate-a64.c (100%)
rename target/arm/{ => tcg}/translate-a64.h (100%)
rename target/arm/{ => tcg}/translate-m-nocp.c (100%)
rename target/arm/{ => tcg}/translate-mve.c (100%)
rename target/arm/{ => tcg}/translate-neon.c (100%)
rename target/arm/{ => tcg}/translate-sme.c (100%)
rename target/arm/{ => tcg}/translate-sve.c (100%)
rename target/arm/{ => tcg}/translate-vfp.c (100%)
rename target/arm/{ => tcg}/translate.c (100%)
rename target/arm/{ => tcg}/translate.h (100%)
rename target/arm/{ => tcg}/vfp-uncond.decode (100%)
rename target/arm/{ => tcg}/vfp.decode (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 96e25f62ac..f4880fe526 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -161,6 +161,7 @@ M: Peter Maydell <peter.maydell@linaro.org>
L: qemu-arm@nongnu.org
S: Maintained
F: target/arm/
+F: target/arm/tcg/
F: tests/tcg/arm/
F: tests/tcg/aarch64/
F: tests/qtest/arm-cpu-features.c
diff --git a/target/arm/meson.build b/target/arm/meson.build
index aa5aae9888..6dc7b800e6 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -1,22 +1,4 @@
-gen = [
- decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
- decodetree.process('sme.decode', extra_args: '--decode=disas_sme'),
- decodetree.process('sme-fa64.decode', extra_args: '--static-decode=disas_sme_fa64'),
- decodetree.process('neon-shared.decode', extra_args: '--decode=disas_neon_shared'),
- decodetree.process('neon-dp.decode', extra_args: '--decode=disas_neon_dp'),
- decodetree.process('neon-ls.decode', extra_args: '--decode=disas_neon_ls'),
- decodetree.process('vfp.decode', extra_args: '--decode=disas_vfp'),
- decodetree.process('vfp-uncond.decode', extra_args: '--decode=disas_vfp_uncond'),
- decodetree.process('m-nocp.decode', extra_args: '--decode=disas_m_nocp'),
- decodetree.process('mve.decode', extra_args: '--decode=disas_mve'),
- decodetree.process('a32.decode', extra_args: '--static-decode=disas_a32'),
- decodetree.process('a32-uncond.decode', extra_args: '--static-decode=disas_a32_uncond'),
- decodetree.process('t32.decode', extra_args: '--static-decode=disas_t32'),
- decodetree.process('t16.decode', extra_args: ['-w', '16', '--static-decode=disas_t16']),
-]
-
arm_ss = ss.source_set()
-arm_ss.add(gen)
arm_ss.add(files(
'cpregs.c',
'cpu.c',
@@ -30,11 +12,6 @@ arm_ss.add(files(
'neon_helper.c',
'op_helper.c',
'tlb_helper.c',
- 'translate.c',
- 'translate-m-nocp.c',
- 'translate-mve.c',
- 'translate-neon.c',
- 'translate-vfp.c',
'vec_helper.c',
'vfp_helper.c',
'cpu_tcg.c',
@@ -51,9 +28,6 @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
'pauth_helper.c',
'sve_helper.c',
'sme_helper.c',
- 'translate-a64.c',
- 'translate-sve.c',
- 'translate-sme.c',
))
arm_softmmu_ss = ss.source_set()
@@ -68,5 +42,9 @@ arm_softmmu_ss.add(files(
subdir('hvf')
+if 'CONFIG_TCG' in config_all
+ subdir('tcg')
+endif
+
target_arch += {'arm': arm_ss}
target_softmmu_arch += {'arm': arm_softmmu_ss}
diff --git a/target/arm/a32-uncond.decode b/target/arm/tcg/a32-uncond.decode
similarity index 100%
rename from target/arm/a32-uncond.decode
rename to target/arm/tcg/a32-uncond.decode
diff --git a/target/arm/a32.decode b/target/arm/tcg/a32.decode
similarity index 100%
rename from target/arm/a32.decode
rename to target/arm/tcg/a32.decode
diff --git a/target/arm/m-nocp.decode b/target/arm/tcg/m-nocp.decode
similarity index 100%
rename from target/arm/m-nocp.decode
rename to target/arm/tcg/m-nocp.decode
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
new file mode 100644
index 0000000000..044561bd4d
--- /dev/null
+++ b/target/arm/tcg/meson.build
@@ -0,0 +1,32 @@
+gen = [
+ decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
+ decodetree.process('sme.decode', extra_args: '--decode=disas_sme'),
+ decodetree.process('sme-fa64.decode', extra_args: '--static-decode=disas_sme_fa64'),
+ decodetree.process('neon-shared.decode', extra_args: '--decode=disas_neon_shared'),
+ decodetree.process('neon-dp.decode', extra_args: '--decode=disas_neon_dp'),
+ decodetree.process('neon-ls.decode', extra_args: '--decode=disas_neon_ls'),
+ decodetree.process('vfp.decode', extra_args: '--decode=disas_vfp'),
+ decodetree.process('vfp-uncond.decode', extra_args: '--decode=disas_vfp_uncond'),
+ decodetree.process('m-nocp.decode', extra_args: '--decode=disas_m_nocp'),
+ decodetree.process('mve.decode', extra_args: '--decode=disas_mve'),
+ decodetree.process('a32.decode', extra_args: '--static-decode=disas_a32'),
+ decodetree.process('a32-uncond.decode', extra_args: '--static-decode=disas_a32_uncond'),
+ decodetree.process('t32.decode', extra_args: '--static-decode=disas_t32'),
+ decodetree.process('t16.decode', extra_args: ['-w', '16', '--static-decode=disas_t16']),
+]
+
+arm_ss.add(gen)
+
+arm_ss.add(files(
+ 'translate.c',
+ 'translate-m-nocp.c',
+ 'translate-mve.c',
+ 'translate-neon.c',
+ 'translate-vfp.c',
+))
+
+arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
+ 'translate-a64.c',
+ 'translate-sve.c',
+ 'translate-sme.c',
+))
diff --git a/target/arm/mve.decode b/target/arm/tcg/mve.decode
similarity index 100%
rename from target/arm/mve.decode
rename to target/arm/tcg/mve.decode
diff --git a/target/arm/neon-dp.decode b/target/arm/tcg/neon-dp.decode
similarity index 100%
rename from target/arm/neon-dp.decode
rename to target/arm/tcg/neon-dp.decode
diff --git a/target/arm/neon-ls.decode b/target/arm/tcg/neon-ls.decode
similarity index 100%
rename from target/arm/neon-ls.decode
rename to target/arm/tcg/neon-ls.decode
diff --git a/target/arm/neon-shared.decode b/target/arm/tcg/neon-shared.decode
similarity index 100%
rename from target/arm/neon-shared.decode
rename to target/arm/tcg/neon-shared.decode
diff --git a/target/arm/sme-fa64.decode b/target/arm/tcg/sme-fa64.decode
similarity index 100%
rename from target/arm/sme-fa64.decode
rename to target/arm/tcg/sme-fa64.decode
diff --git a/target/arm/sme.decode b/target/arm/tcg/sme.decode
similarity index 100%
rename from target/arm/sme.decode
rename to target/arm/tcg/sme.decode
diff --git a/target/arm/sve.decode b/target/arm/tcg/sve.decode
similarity index 100%
rename from target/arm/sve.decode
rename to target/arm/tcg/sve.decode
diff --git a/target/arm/t16.decode b/target/arm/tcg/t16.decode
similarity index 100%
rename from target/arm/t16.decode
rename to target/arm/tcg/t16.decode
diff --git a/target/arm/t32.decode b/target/arm/tcg/t32.decode
similarity index 100%
rename from target/arm/t32.decode
rename to target/arm/tcg/t32.decode
diff --git a/target/arm/translate-a64.c b/target/arm/tcg/translate-a64.c
similarity index 100%
rename from target/arm/translate-a64.c
rename to target/arm/tcg/translate-a64.c
diff --git a/target/arm/translate-a64.h b/target/arm/tcg/translate-a64.h
similarity index 100%
rename from target/arm/translate-a64.h
rename to target/arm/tcg/translate-a64.h
diff --git a/target/arm/translate-m-nocp.c b/target/arm/tcg/translate-m-nocp.c
similarity index 100%
rename from target/arm/translate-m-nocp.c
rename to target/arm/tcg/translate-m-nocp.c
diff --git a/target/arm/translate-mve.c b/target/arm/tcg/translate-mve.c
similarity index 100%
rename from target/arm/translate-mve.c
rename to target/arm/tcg/translate-mve.c
diff --git a/target/arm/translate-neon.c b/target/arm/tcg/translate-neon.c
similarity index 100%
rename from target/arm/translate-neon.c
rename to target/arm/tcg/translate-neon.c
diff --git a/target/arm/translate-sme.c b/target/arm/tcg/translate-sme.c
similarity index 100%
rename from target/arm/translate-sme.c
rename to target/arm/tcg/translate-sme.c
diff --git a/target/arm/translate-sve.c b/target/arm/tcg/translate-sve.c
similarity index 100%
rename from target/arm/translate-sve.c
rename to target/arm/tcg/translate-sve.c
diff --git a/target/arm/translate-vfp.c b/target/arm/tcg/translate-vfp.c
similarity index 100%
rename from target/arm/translate-vfp.c
rename to target/arm/tcg/translate-vfp.c
diff --git a/target/arm/translate.c b/target/arm/tcg/translate.c
similarity index 100%
rename from target/arm/translate.c
rename to target/arm/tcg/translate.c
diff --git a/target/arm/translate.h b/target/arm/tcg/translate.h
similarity index 100%
rename from target/arm/translate.h
rename to target/arm/tcg/translate.h
diff --git a/target/arm/vfp-uncond.decode b/target/arm/tcg/vfp-uncond.decode
similarity index 100%
rename from target/arm/vfp-uncond.decode
rename to target/arm/tcg/vfp-uncond.decode
diff --git a/target/arm/vfp.decode b/target/arm/tcg/vfp.decode
similarity index 100%
rename from target/arm/vfp.decode
rename to target/arm/tcg/vfp.decode
--
2.35.3
next prev parent reply other threads:[~2023-02-13 20:36 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-13 20:28 [PATCH RESEND v5 00/28] target/arm: Allow CONFIG_TCG=n builds Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 01/28] target/arm: rename handle_semihosting to tcg_handle_semihosting Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 02/28] target/arm: wrap psci call with tcg_enabled Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 03/28] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 04/28] target/arm: Move PC alignment check Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 05/28] target/arm: Move cpregs code out of cpu.h Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 06/28] target/arm: Move cpregs code into cpregs.c Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 07/28] target/arm: Move define_debug_regs() to cpregs.c Fabiano Rosas
2023-02-16 16:22 ` Peter Maydell
2023-02-13 20:29 ` [PATCH RESEND v5 08/28] target/arm: Wrap breakpoint/watchpoint updates with tcg_enabled Fabiano Rosas
2023-02-13 20:29 ` Fabiano Rosas [this message]
2023-02-13 20:29 ` [PATCH RESEND v5 10/28] target/arm: move helpers to tcg/ Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 11/28] target/arm: Move psci.c into the tcg directory Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 12/28] target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 13/28] target/arm: Move hflags code into the tcg directory Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 14/28] target/arm: Move regime_using_lpae_format into internal.h Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 15/28] target/arm: Don't access TCG code when debugging with KVM Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 16/28] cpu-defs.h: Expose CPUTLBEntryFull to non-TCG code Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 17/28] target/arm: Move cortex sysregs into cpregs.c Fabiano Rosas
2023-02-16 16:24 ` Peter Maydell
2023-02-13 20:29 ` [PATCH RESEND v5 18/28] tests/avocado: Skip tests that require a missing accelerator Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 19/28] tests/avocado: Tag TCG tests with accel:tcg Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 20/28] target/arm: Move 64-bit TCG CPUs into tcg/ Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 21/28] target/arm: move cpu_tcg to tcg/cpu32.c Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 22/28] target/arm: Use "max" as default cpu for the virt machine with KVM Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 23/28] tests/qtest: arm-cpu-features: Match tests to required accelerators Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 24/28] tests/qtest: Restrict tpm-tis-devices-{swtpm}-test to CONFIG_TCG Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 25/28] target/avocado: Pass parameters to migration test on aarch64 Fabiano Rosas
2023-02-16 16:32 ` Peter Maydell
2023-02-13 20:29 ` [PATCH RESEND v5 26/28] arm/Kconfig: Always select SEMIHOSTING when TCG is present Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 27/28] arm/Kconfig: Do not build TCG-only boards on a KVM-only build Fabiano Rosas
2023-02-13 20:29 ` [PATCH RESEND v5 28/28] gitlab-ci: Check building KVM-only aarch64 target Fabiano Rosas
2023-02-16 16:19 ` [PATCH RESEND v5 00/28] target/arm: Allow CONFIG_TCG=n builds Peter Maydell
2023-02-16 16:30 ` Peter Maydell
2023-02-16 16:47 ` Fabiano Rosas
2023-02-16 17:22 ` Peter Maydell
2023-02-16 19:21 ` Richard Henderson
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