From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH 05/14] target/arm: Simplify register counting in arm_gen_dynamic_svereg_xml
Date: Tue, 14 Feb 2023 06:30:39 -1000 [thread overview]
Message-ID: <20230214163048.903964-6-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230214163048.903964-1-richard.henderson@linaro.org>
Rather than increment base_reg and num, compute num
from the change to base_reg at the end. Clean up some
nearby comments.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/gdbstub64.c | 26 ++++++++++++++++----------
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 811833d8de..8d174ff6e0 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -277,32 +277,35 @@ static void output_vector_union_type(GString *s, int reg_width)
g_string_append(s, "</union>");
}
-int arm_gen_dynamic_svereg_xml(CPUState *cs, int base_reg)
+int arm_gen_dynamic_svereg_xml(CPUState *cs, int orig_base_reg)
{
ARMCPU *cpu = ARM_CPU(cs);
GString *s = g_string_new(NULL);
DynamicGDBXMLInfo *info = &cpu->dyn_svereg_xml;
- int i, reg_width = (cpu->sve_max_vq * 128);
- info->num = 0;
+ int reg_width = cpu->sve_max_vq * 128;
+ int base_reg = orig_base_reg;
+ int i;
+
g_string_printf(s, "<?xml version=\"1.0\"?>");
g_string_append_printf(s, "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">");
g_string_append_printf(s, "<feature name=\"org.gnu.gdb.aarch64.sve\">");
+ /* Create the vector union type. */
output_vector_union_type(s, reg_width);
- /* Finally the sve prefix type */
+ /* Create the predicate vector type. */
g_string_append_printf(s,
"<vector id=\"svep\" type=\"uint8\" count=\"%d\"/>",
reg_width / 8);
- /* Then define each register in parts for each vq */
+ /* Define the vector registers. */
for (i = 0; i < 32; i++) {
g_string_append_printf(s,
"<reg name=\"z%d\" bitsize=\"%d\""
" regnum=\"%d\" type=\"svev\"/>",
i, reg_width, base_reg++);
- info->num++;
}
+
/* fpscr & status registers */
g_string_append_printf(s, "<reg name=\"fpsr\" bitsize=\"32\""
" regnum=\"%d\" group=\"float\""
@@ -310,8 +313,8 @@ int arm_gen_dynamic_svereg_xml(CPUState *cs, int base_reg)
g_string_append_printf(s, "<reg name=\"fpcr\" bitsize=\"32\""
" regnum=\"%d\" group=\"float\""
" type=\"int\"/>", base_reg++);
- info->num += 2;
+ /* Define the predicate registers. */
for (i = 0; i < 16; i++) {
g_string_append_printf(s,
"<reg name=\"p%d\" bitsize=\"%d\""
@@ -324,13 +327,16 @@ int arm_gen_dynamic_svereg_xml(CPUState *cs, int base_reg)
" regnum=\"%d\" group=\"vector\""
" type=\"svep\"/>",
cpu->sve_max_vq * 16, base_reg++);
+
+ /* Define the vector length pseudo-register. */
g_string_append_printf(s,
"<reg name=\"vg\" bitsize=\"64\""
" regnum=\"%d\" type=\"int\"/>",
base_reg++);
- info->num += 2;
- g_string_append_printf(s, "</feature>");
- info->desc = g_string_free(s, false);
+ g_string_append_printf(s, "</feature>");
+
+ info->desc = g_string_free(s, false);
+ info->num = base_reg - orig_base_reg;
return info->num;
}
--
2.34.1
next prev parent reply other threads:[~2023-02-14 16:33 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-14 16:30 [PATCH 00/14] target/arm: gdbstub cleanups and additions Richard Henderson
2023-02-14 16:30 ` [PATCH 01/14] target/arm: Normalize aarch64 gdbstub get/set function names Richard Henderson
2023-02-14 18:55 ` Fabiano Rosas
2023-02-14 16:30 ` [PATCH 02/14] target/arm: Unexport arm_gen_dynamic_sysreg_xml Richard Henderson
2023-02-14 18:57 ` Fabiano Rosas
2023-02-14 16:30 ` [PATCH 03/14] target/arm: Move arm_gen_dynamic_svereg_xml to gdbstub64.c Richard Henderson
2023-02-14 19:08 ` Fabiano Rosas
2023-02-14 16:30 ` [PATCH 04/14] target/arm: Split out output_vector_union_type Richard Henderson
2023-02-14 19:35 ` Fabiano Rosas
2023-02-20 16:07 ` Peter Maydell
2023-02-14 16:30 ` Richard Henderson [this message]
2023-02-14 19:42 ` [PATCH 05/14] target/arm: Simplify register counting in arm_gen_dynamic_svereg_xml Fabiano Rosas
2023-02-14 22:56 ` Richard Henderson
2023-02-14 16:30 ` [PATCH 06/14] target/arm: Hoist pred_width " Richard Henderson
2023-02-14 19:44 ` Fabiano Rosas
2023-02-14 16:30 ` [PATCH 07/14] target/arm: Fix svep width " Richard Henderson
2023-02-20 16:18 ` Peter Maydell
2023-02-14 16:30 ` [PATCH 08/14] target/arm: Add name argument to output_vector_union_type Richard Henderson
2023-02-20 16:20 ` Peter Maydell
2023-02-14 16:30 ` [PATCH 09/14] target/arm: Simplify iteration over bit widths Richard Henderson
2023-02-20 16:24 ` Peter Maydell
2023-02-14 16:30 ` [PATCH 10/14] target/arm: Create pauth_ptr_mask Richard Henderson
2023-02-20 16:39 ` Peter Maydell
2023-02-14 16:30 ` [PATCH 11/14] target/arm: Implement gdbstub pauth extension Richard Henderson
2023-02-20 16:58 ` Peter Maydell
2023-02-14 16:30 ` [PATCH 12/14] target/arm: Export arm_v7m_mrs_control Richard Henderson
2023-02-20 16:50 ` Peter Maydell
2023-02-14 16:30 ` [PATCH 13/14] target/arm: Export arm_v7m_get_sp_ptr Richard Henderson
2023-02-20 16:51 ` Peter Maydell
2023-02-14 16:30 ` [PATCH 14/14] target/arm: Support reading m-profile system registers from gdb Richard Henderson
2023-02-14 16:33 ` Richard Henderson
2023-02-20 16:02 ` Peter Maydell
2023-02-20 17:00 ` Richard Henderson
2023-02-20 17:37 ` Peter Maydell
2023-02-20 18:27 ` Luis Machado
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