* [PATCH] target/riscv: Fix checking of whether instruciton at 'pc_next' spans pages
@ 2023-02-20 7:27 Shaobo Song
2023-02-21 17:36 ` Richard Henderson
2023-03-02 1:09 ` Palmer Dabbelt
0 siblings, 2 replies; 4+ messages in thread
From: Shaobo Song @ 2023-02-20 7:27 UTC (permalink / raw)
To: zhengyu; +Cc: qemu-devel, richard.henderson, alistair.francis, Shaobo Song
This bug has a noticeable behavior of falling back to the main loop and
respawning a redundant translation block including a single instruction
when the end address of the compressive instruction is exactly on a page
boundary, and slows down running system performance.
Signed-off-by: Shaobo Song <songshaobo@eswincomputing.com>
---
target/riscv/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 772f9d7..8ffa211 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -1261,7 +1261,7 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
uint16_t next_insn = cpu_lduw_code(env, ctx->base.pc_next);
int len = insn_len(next_insn);
- if (!is_same_page(&ctx->base, ctx->base.pc_next + len)) {
+ if (!is_same_page(&ctx->base, ctx->base.pc_next + len - 1)) {
ctx->base.is_jmp = DISAS_TOO_MANY;
}
}
--
2.33.1.windows.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] target/riscv: Fix checking of whether instruciton at 'pc_next' spans pages
@ 2023-02-20 7:29 Shaobo Song
0 siblings, 0 replies; 4+ messages in thread
From: Shaobo Song @ 2023-02-20 7:29 UTC (permalink / raw)
To: qemu-devel; +Cc: richard.henderson, alistair.francis, Shaobo Song
This bug has a noticeable behavior of falling back to the main loop and
respawning a redundant translation block including a single instruction
when the end address of the compressive instruction is exactly on a page
boundary, and slows down running system performance.
Signed-off-by: Shaobo Song <songshaobo@eswincomputing.com>
---
target/riscv/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 772f9d7..8ffa211 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -1261,7 +1261,7 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
uint16_t next_insn = cpu_lduw_code(env, ctx->base.pc_next);
int len = insn_len(next_insn);
- if (!is_same_page(&ctx->base, ctx->base.pc_next + len)) {
+ if (!is_same_page(&ctx->base, ctx->base.pc_next + len - 1)) {
ctx->base.is_jmp = DISAS_TOO_MANY;
}
}
--
2.33.1.windows.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] target/riscv: Fix checking of whether instruciton at 'pc_next' spans pages
2023-02-20 7:27 [PATCH] target/riscv: Fix checking of whether instruciton at 'pc_next' spans pages Shaobo Song
@ 2023-02-21 17:36 ` Richard Henderson
2023-03-02 1:09 ` Palmer Dabbelt
1 sibling, 0 replies; 4+ messages in thread
From: Richard Henderson @ 2023-02-21 17:36 UTC (permalink / raw)
To: Shaobo Song, zhengyu; +Cc: qemu-devel, alistair.francis
On 2/19/23 21:27, Shaobo Song wrote:
> This bug has a noticeable behavior of falling back to the main loop and
> respawning a redundant translation block including a single instruction
> when the end address of the compressive instruction is exactly on a page
> boundary, and slows down running system performance.
>
> Signed-off-by: Shaobo Song<songshaobo@eswincomputing.com>
> ---
> target/riscv/translate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] target/riscv: Fix checking of whether instruciton at 'pc_next' spans pages
2023-02-20 7:27 [PATCH] target/riscv: Fix checking of whether instruciton at 'pc_next' spans pages Shaobo Song
2023-02-21 17:36 ` Richard Henderson
@ 2023-03-02 1:09 ` Palmer Dabbelt
1 sibling, 0 replies; 4+ messages in thread
From: Palmer Dabbelt @ 2023-03-02 1:09 UTC (permalink / raw)
To: songshaobo
Cc: zhengyu, qemu-devel, Richard Henderson, Alistair Francis,
songshaobo
On Sun, 19 Feb 2023 23:27:32 PST (-0800), songshaobo@eswincomputing.com wrote:
> This bug has a noticeable behavior of falling back to the main loop and
> respawning a redundant translation block including a single instruction
> when the end address of the compressive instruction is exactly on a page
> boundary, and slows down running system performance.
>
> Signed-off-by: Shaobo Song <songshaobo@eswincomputing.com>
> ---
> target/riscv/translate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index 772f9d7..8ffa211 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -1261,7 +1261,7 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
> uint16_t next_insn = cpu_lduw_code(env, ctx->base.pc_next);
> int len = insn_len(next_insn);
>
> - if (!is_same_page(&ctx->base, ctx->base.pc_next + len)) {
> + if (!is_same_page(&ctx->base, ctx->base.pc_next + len - 1)) {
> ctx->base.is_jmp = DISAS_TOO_MANY;
> }
> }
Thanks, this is queued in riscv-to-apply.next .
^ permalink raw reply [flat|nested] 4+ messages in thread
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2023-02-21 17:36 ` Richard Henderson
2023-03-02 1:09 ` Palmer Dabbelt
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