From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Pierrick Bouvier <pierrick.bouvier@linaro.org>
Subject: [PULL v2 7/8] util/cacheflush: fix cache on windows-arm64
Date: Tue, 21 Feb 2023 16:00:22 -1000 [thread overview]
Message-ID: <20230222020023.904232-8-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230222020023.904232-1-richard.henderson@linaro.org>
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
ctr_el0 access is privileged on this platform and fails as an illegal
instruction.
Windows does not offer a way to flush data cache from userspace, and
only FlushInstructionCache is available in Windows API.
The generic implementation of flush_idcache_range uses,
__builtin___clear_cache, which already use the FlushInstructionCache
function. So we rely on that.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230221153006.20300-2-pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
util/cacheflush.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/util/cacheflush.c b/util/cacheflush.c
index 2c2c73e085..06c2333a60 100644
--- a/util/cacheflush.c
+++ b/util/cacheflush.c
@@ -121,8 +121,12 @@ static void sys_cache_info(int *isize, int *dsize)
static bool have_coherent_icache;
#endif
-#if defined(__aarch64__) && !defined(CONFIG_DARWIN)
-/* Apple does not expose CTR_EL0, so we must use system interfaces. */
+#if defined(__aarch64__) && !defined(CONFIG_DARWIN) && !defined(CONFIG_WIN32)
+/*
+ * Apple does not expose CTR_EL0, so we must use system interfaces.
+ * Windows neither, but we use a generic implementation of flush_idcache_range
+ * in this case.
+ */
static uint64_t save_ctr_el0;
static void arch_cache_info(int *isize, int *dsize)
{
@@ -225,7 +229,11 @@ static void __attribute__((constructor)) init_cache_info(void)
/* Caches are coherent and do not require flushing; symbol inline. */
-#elif defined(__aarch64__)
+#elif defined(__aarch64__) && !defined(CONFIG_WIN32)
+/*
+ * For Windows, we use generic implementation of flush_idcache_range, that
+ * performs a call to FlushInstructionCache, through __builtin___clear_cache.
+ */
#ifdef CONFIG_DARWIN
/* Apple does not expose CTR_EL0, so we must use system interfaces. */
--
2.34.1
next prev parent reply other threads:[~2023-02-22 2:01 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-22 2:00 [PULL v2 0/8] tcg patch queue Richard Henderson
2023-02-22 2:00 ` [PULL v2 1/8] accel/tcg: Allow the second page of an instruction to be MMIO Richard Henderson
2023-02-22 2:00 ` [PULL v2 2/8] linux-user/sparc: Raise SIGILL for all unhandled software traps Richard Henderson
2023-02-22 2:00 ` [PULL v2 3/8] linux-user: Always exit from exclusive state in fork_end() Richard Henderson
2023-02-22 2:00 ` [PULL v2 4/8] cpus: Make {start,end}_exclusive() recursive Richard Henderson
2023-02-22 2:00 ` [PULL v2 5/8] linux-user/microblaze: Handle privileged exception Richard Henderson
2023-02-22 2:00 ` [PULL v2 6/8] target/microblaze: Add gdbstub xml Richard Henderson
2023-02-22 2:00 ` Richard Henderson [this message]
2023-02-22 2:00 ` [PULL v2 8/8] sysemu/os-win32: fix setjmp/longjmp on windows-arm64 Richard Henderson
2023-02-24 12:46 ` [PULL v2 0/8] tcg patch queue Peter Maydell
2023-02-24 13:05 ` Peter Maydell
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