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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH NOTFORMERGE v3 25/25] hw/arm/virt: Add some memory for Realm Management Monitor
Date: Tue, 21 Feb 2023 16:33:36 -1000	[thread overview]
Message-ID: <20230222023336.915045-26-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230222023336.915045-1-richard.henderson@linaro.org>

This is arbitrary, but used by the Huawei TF-A test code.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/hw/arm/virt.h |  2 ++
 hw/arm/virt.c         | 43 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index e1ddbea96b..5c0c8a67e4 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -86,6 +86,7 @@ enum {
     VIRT_ACPI_GED,
     VIRT_NVDIMM_ACPI,
     VIRT_PVTIME,
+    VIRT_RMM_MEM,
     VIRT_LOWMEMMAP_LAST,
 };
 
@@ -159,6 +160,7 @@ struct VirtMachineState {
     bool virt;
     bool ras;
     bool mte;
+    bool rmm;
     bool dtb_randomness;
     OnOffAuto acpi;
     VirtGICType gic_version;
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index ac626b3bef..067f16cd77 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -159,6 +159,7 @@ static const MemMapEntry base_memmap[] = {
     /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
     [VIRT_PLATFORM_BUS] =       { 0x0c000000, 0x02000000 },
     [VIRT_SECURE_MEM] =         { 0x0e000000, 0x01000000 },
+    [VIRT_RMM_MEM] =            { 0x0f000000, 0x00100000 },
     [VIRT_PCIE_MMIO] =          { 0x10000000, 0x2eff0000 },
     [VIRT_PCIE_PIO] =           { 0x3eff0000, 0x00010000 },
     [VIRT_PCIE_ECAM] =          { 0x3f000000, 0x01000000 },
@@ -1602,6 +1603,25 @@ static void create_secure_ram(VirtMachineState *vms,
     g_free(nodename);
 }
 
+static void create_rmm_ram(VirtMachineState *vms,
+                           MemoryRegion *sysmem,
+                           MemoryRegion *tag_sysmem)
+{
+    MemoryRegion *rmm_ram = g_new(MemoryRegion, 1);
+    hwaddr base = vms->memmap[VIRT_RMM_MEM].base;
+    hwaddr size = vms->memmap[VIRT_RMM_MEM].size;
+
+    memory_region_init_ram(rmm_ram, NULL, "virt.rmm-ram", size,
+                           &error_fatal);
+    memory_region_add_subregion(sysmem, base, rmm_ram);
+
+    /* do not fill in fdt to hide rmm from normal world guest */
+
+    if (tag_sysmem) {
+        create_tag_ram(tag_sysmem, base, size, "mach-virt.rmm-tag");
+    }
+}
+
 static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size)
 {
     const VirtMachineState *board = container_of(binfo, VirtMachineState,
@@ -2283,6 +2303,10 @@ static void machvirt_init(MachineState *machine)
                        machine->ram_size, "mach-virt.tag");
     }
 
+    if (vms->rmm) {
+        create_rmm_ram(vms, sysmem, tag_sysmem);
+    }
+
     vms->highmem_ecam &= (!firmware_loaded || aarch64);
 
     create_rtc(vms);
@@ -2562,6 +2586,20 @@ static void virt_set_mte(Object *obj, bool value, Error **errp)
     vms->mte = value;
 }
 
+static bool virt_get_rmm(Object *obj, Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    return vms->rmm;
+}
+
+static void virt_set_rmm(Object *obj, bool value, Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    vms->rmm = value;
+}
+
 static char *virt_get_gic_version(Object *obj, Error **errp)
 {
     VirtMachineState *vms = VIRT_MACHINE(obj);
@@ -3115,6 +3153,11 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
                                           "guest CPU which implements the ARM "
                                           "Memory Tagging Extension");
 
+    object_class_property_add_bool(oc, "rmm", virt_get_rmm, virt_set_rmm);
+    object_class_property_set_description(oc, "rmm",
+                                          "Set on/off to enable/disable ram "
+                                          "for the Realm Management Monitor");
+
     object_class_property_add_bool(oc, "its", virt_get_its,
                                    virt_set_its);
     object_class_property_set_description(oc, "its",
-- 
2.34.1



      parent reply	other threads:[~2023-02-22  2:37 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-22  2:33 [PATCH v3 00/25] target/arm: Implement FEAT_RME Richard Henderson
2023-02-22  2:33 ` [PATCH v3 01/25] target/arm: Handle m-profile in arm_is_secure Richard Henderson
2023-02-24 13:14   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 02/25] target/arm: Stub arm_hcr_el2_eff for m-profile Richard Henderson
2023-02-24 13:15   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 03/25] target/arm: Diagnose incorrect usage of arm_is_secure subroutines Richard Henderson
2023-02-22  9:39   ` Philippe Mathieu-Daudé
2023-02-24 13:16   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 04/25] target/arm: Rewrite check_s2_mmu_setup Richard Henderson
2023-02-24 13:53   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 05/25] target/arm: Add isar_feature_aa64_rme Richard Henderson
2023-02-22  9:41   ` Philippe Mathieu-Daudé
2023-02-22  2:33 ` [PATCH v3 06/25] target/arm: Update SCR and HCR for RME Richard Henderson
2023-02-22  2:33 ` [PATCH v3 07/25] target/arm: SCR_EL3.NS may be RES1 Richard Henderson
2023-02-24 14:24   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 08/25] target/arm: Add RME cpregs Richard Henderson
2023-02-22  2:33 ` [PATCH v3 09/25] target/arm: Introduce ARMSecuritySpace Richard Henderson
2023-02-22  2:33 ` [PATCH v3 10/25] include/exec/memattrs: Add two bits of space to MemTxAttrs Richard Henderson
2023-02-22  2:33 ` [PATCH v3 11/25] target/arm: Adjust the order of Phys and Stage2 ARMMMUIdx Richard Henderson
2023-02-22  2:33 ` [PATCH v3 12/25] target/arm: Introduce ARMMMUIdx_Phys_{Realm,Root} Richard Henderson
2023-02-22  9:44   ` Philippe Mathieu-Daudé
2023-02-22  2:33 ` [PATCH v3 13/25] target/arm: Remove __attribute__((nonnull)) from ptw.c Richard Henderson
2023-02-22  9:44   ` Philippe Mathieu-Daudé
2023-02-24 13:18   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 14/25] target/arm: Pipe ARMSecuritySpace through ptw.c Richard Henderson
2023-02-22  2:33 ` [PATCH v3 15/25] target/arm: NSTable is RES0 for the RME EL3 regime Richard Henderson
2023-02-24 14:28   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 16/25] target/arm: Handle Block and Page bits for security space Richard Henderson
2023-02-24 14:51   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 17/25] target/arm: Handle no-execute for Realm and Root regimes Richard Henderson
2023-02-24 14:58   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 18/25] target/arm: Use get_phys_addr_with_struct in S1_ptw_translate Richard Henderson
2023-02-22  2:33 ` [PATCH v3 19/25] target/arm: Move s1_is_el0 into S1Translate Richard Henderson
2023-02-22  9:46   ` Philippe Mathieu-Daudé
2023-02-22  2:33 ` [PATCH v3 20/25] target/arm: Use get_phys_addr_with_struct for stage2 Richard Henderson
2023-02-22  9:50   ` Philippe Mathieu-Daudé
2023-02-24 15:06   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 21/25] target/arm: Add GPC syndrome Richard Henderson
2023-02-22  2:33 ` [PATCH v3 22/25] target/arm: Implement GPC exceptions Richard Henderson
2023-02-22  2:33 ` [PATCH v3 23/25] target/arm: Implement the granule protection check Richard Henderson
2023-02-22  2:33 ` [PATCH NOTFORMERGE v3 24/25] target/arm: Enable RME for -cpu max Richard Henderson
2023-02-22  2:33 ` Richard Henderson [this message]

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