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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH v3 03/25] target/arm: Diagnose incorrect usage of arm_is_secure subroutines
Date: Tue, 21 Feb 2023 16:33:14 -1000	[thread overview]
Message-ID: <20230222023336.915045-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230222023336.915045-1-richard.henderson@linaro.org>

In several places we use arm_is_secure_below_el3 and
arm_is_el3_or_mon separately from arm_is_secure.
These functions make no sense for m-profile, and
would indicate prior incorrect feature testing.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/cpu.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7a2f804aeb..cb4e405f04 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2389,7 +2389,8 @@ static inline int arm_feature(CPUARMState *env, int feature)
 void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp);
 
 #if !defined(CONFIG_USER_ONLY)
-/* Return true if exception levels below EL3 are in secure state,
+/*
+ * Return true if exception levels below EL3 are in secure state,
  * or would be following an exception return to that level.
  * Unlike arm_is_secure() (which is always a question about the
  * _current_ state of the CPU) this doesn't care about the current
@@ -2397,6 +2398,7 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp);
  */
 static inline bool arm_is_secure_below_el3(CPUARMState *env)
 {
+    assert(!arm_feature(env, ARM_FEATURE_M));
     if (arm_feature(env, ARM_FEATURE_EL3)) {
         return !(env->cp15.scr_el3 & SCR_NS);
     } else {
@@ -2410,6 +2412,7 @@ static inline bool arm_is_secure_below_el3(CPUARMState *env)
 /* Return true if the CPU is AArch64 EL3 or AArch32 Mon */
 static inline bool arm_is_el3_or_mon(CPUARMState *env)
 {
+    assert(!arm_feature(env, ARM_FEATURE_M));
     if (arm_feature(env, ARM_FEATURE_EL3)) {
         if (is_a64(env) && extract32(env->pstate, 2, 2) == 3) {
             /* CPU currently in AArch64 state and EL3 */
-- 
2.34.1



  parent reply	other threads:[~2023-02-22  2:34 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-22  2:33 [PATCH v3 00/25] target/arm: Implement FEAT_RME Richard Henderson
2023-02-22  2:33 ` [PATCH v3 01/25] target/arm: Handle m-profile in arm_is_secure Richard Henderson
2023-02-24 13:14   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 02/25] target/arm: Stub arm_hcr_el2_eff for m-profile Richard Henderson
2023-02-24 13:15   ` Peter Maydell
2023-02-22  2:33 ` Richard Henderson [this message]
2023-02-22  9:39   ` [PATCH v3 03/25] target/arm: Diagnose incorrect usage of arm_is_secure subroutines Philippe Mathieu-Daudé
2023-02-24 13:16   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 04/25] target/arm: Rewrite check_s2_mmu_setup Richard Henderson
2023-02-24 13:53   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 05/25] target/arm: Add isar_feature_aa64_rme Richard Henderson
2023-02-22  9:41   ` Philippe Mathieu-Daudé
2023-02-22  2:33 ` [PATCH v3 06/25] target/arm: Update SCR and HCR for RME Richard Henderson
2023-02-22  2:33 ` [PATCH v3 07/25] target/arm: SCR_EL3.NS may be RES1 Richard Henderson
2023-02-24 14:24   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 08/25] target/arm: Add RME cpregs Richard Henderson
2023-02-22  2:33 ` [PATCH v3 09/25] target/arm: Introduce ARMSecuritySpace Richard Henderson
2023-02-22  2:33 ` [PATCH v3 10/25] include/exec/memattrs: Add two bits of space to MemTxAttrs Richard Henderson
2023-02-22  2:33 ` [PATCH v3 11/25] target/arm: Adjust the order of Phys and Stage2 ARMMMUIdx Richard Henderson
2023-02-22  2:33 ` [PATCH v3 12/25] target/arm: Introduce ARMMMUIdx_Phys_{Realm,Root} Richard Henderson
2023-02-22  9:44   ` Philippe Mathieu-Daudé
2023-02-22  2:33 ` [PATCH v3 13/25] target/arm: Remove __attribute__((nonnull)) from ptw.c Richard Henderson
2023-02-22  9:44   ` Philippe Mathieu-Daudé
2023-02-24 13:18   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 14/25] target/arm: Pipe ARMSecuritySpace through ptw.c Richard Henderson
2023-02-22  2:33 ` [PATCH v3 15/25] target/arm: NSTable is RES0 for the RME EL3 regime Richard Henderson
2023-02-24 14:28   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 16/25] target/arm: Handle Block and Page bits for security space Richard Henderson
2023-02-24 14:51   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 17/25] target/arm: Handle no-execute for Realm and Root regimes Richard Henderson
2023-02-24 14:58   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 18/25] target/arm: Use get_phys_addr_with_struct in S1_ptw_translate Richard Henderson
2023-02-22  2:33 ` [PATCH v3 19/25] target/arm: Move s1_is_el0 into S1Translate Richard Henderson
2023-02-22  9:46   ` Philippe Mathieu-Daudé
2023-02-22  2:33 ` [PATCH v3 20/25] target/arm: Use get_phys_addr_with_struct for stage2 Richard Henderson
2023-02-22  9:50   ` Philippe Mathieu-Daudé
2023-02-24 15:06   ` Peter Maydell
2023-02-22  2:33 ` [PATCH v3 21/25] target/arm: Add GPC syndrome Richard Henderson
2023-02-22  2:33 ` [PATCH v3 22/25] target/arm: Implement GPC exceptions Richard Henderson
2023-02-22  2:33 ` [PATCH v3 23/25] target/arm: Implement the granule protection check Richard Henderson
2023-02-22  2:33 ` [PATCH NOTFORMERGE v3 24/25] target/arm: Enable RME for -cpu max Richard Henderson
2023-02-22  2:33 ` [PATCH NOTFORMERGE v3 25/25] hw/arm/virt: Add some memory for Realm Management Monitor Richard Henderson

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