[PATCH v2 0/3] target/tcg: Use TCGv_i64 with tcg_temp_new_i64()

[PATCH v2 0/3] target/tcg: Use TCGv_i64 with tcg_temp_new_i64()

[Philippe Mathieu-Daudé]

Missing review: #2

Although on 64-bit targets TCGv is defined as TCGv_i64,
clarify using the correct type for tcg_temp_new_i64().

Since v1:
- Added alpha patch (Ilya)
- Also use tcg_temp_free_i64()

Philippe Mathieu-Daudé (3):
  target/s390x: Replace TCGv by TCGv_i64 in op_mov2e()
  target/alpha: Replace TCGv by TCGv_i64 in gen_cpy_mask()
  target/sparc64: Replace TCGv by TCGv_i64 in gen_op_multiply()

 target/alpha/translate.c     | 4 ++--
 target/s390x/tcg/translate.c | 2 +-
 target/sparc/translate.c     | 8 ++++----
 3 files changed, 7 insertions(+), 7 deletions(-)

-- 
2.38.1

[PATCH v2 1/3] target/s390x: Replace TCGv by TCGv_i64 in op_mov2e()

[Philippe Mathieu-Daudé]

Although TCGv is defined as TCGv_i64 on s390x,
make it clear tcg_temp_new_i64() returns a TCGv_i64.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index ac5bd98f04..610b5df84f 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -3350,7 +3350,7 @@ static DisasJumpType op_mov2(DisasContext *s, DisasOps *o)
 static DisasJumpType op_mov2e(DisasContext *s, DisasOps *o)
 {
     int b2 = get_field(s, b2);
-    TCGv ar1 = tcg_temp_new_i64();
+    TCGv_i64 ar1 = tcg_temp_new_i64();
 
     o->out = o->in2;
     o->g_out = o->g_in2;
-- 
2.38.1

[PATCH v2 2/3] target/alpha: Replace TCGv by TCGv_i64 in gen_cpy_mask()

[Philippe Mathieu-Daudé]

Although TCGv is defined as TCGv_i64 on alpha,
make it clear tcg_temp_new_i64() returns a TCGv_i64.
Free calling tcg_temp_free_i64().

Suggested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/alpha/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index f9bcdeb717..06894094b7 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -798,7 +798,7 @@ IEEE_INTCVT(cvtqt)
 static void gen_cpy_mask(TCGv vc, TCGv va, TCGv vb, bool inv_a, uint64_t mask)
 {
     TCGv vmask = tcg_constant_i64(mask);
-    TCGv tmp = tcg_temp_new_i64();
+    TCGv_i64 tmp = tcg_temp_new_i64();
 
     if (inv_a) {
         tcg_gen_andc_i64(tmp, vmask, va);
@@ -809,7 +809,7 @@ static void gen_cpy_mask(TCGv vc, TCGv va, TCGv vb, bool inv_a, uint64_t mask)
     tcg_gen_andc_i64(vc, vb, vmask);
     tcg_gen_or_i64(vc, vc, tmp);
 
-    tcg_temp_free(tmp);
+    tcg_temp_free_i64(tmp);
 }
 
 static void gen_ieee_arith3(DisasContext *ctx,
-- 
2.38.1

Re: [PATCH v2 2/3] target/alpha: Replace TCGv by TCGv_i64 in gen_cpy_mask()

[Anton Johansson via]

On 2/23/23 19:04, Philippe Mathieu-Daudé wrote:
> Although TCGv is defined as TCGv_i64 on alpha,
> make it clear tcg_temp_new_i64() returns a TCGv_i64.
> Free calling tcg_temp_free_i64().
>
> Suggested-by: Ilya Leoshkevich <iii@linux.ibm.com>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/alpha/translate.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Anton Johansson <anjo@rev.ng>

[PATCH v2 3/3] target/sparc64: Replace TCGv by TCGv_i64 in gen_op_multiply()

[Philippe Mathieu-Daudé]

Although TCGv is defined as TCGv_i64 on sparc64,
make it clear tcg_temp_new_i64() returns a TCGv_i64.
Free calling tcg_temp_free_i64().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/sparc/translate.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 150aeecd14..3cac26680f 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -634,8 +634,8 @@ static inline void gen_op_multiply(TCGv dst, TCGv src1, TCGv src2, int sign_ext)
         tcg_gen_mulu2_tl(dst, cpu_y, src1, src2);
     }
 #else
-    TCGv t0 = tcg_temp_new_i64();
-    TCGv t1 = tcg_temp_new_i64();
+    TCGv_i64 t0 = tcg_temp_new_i64();
+    TCGv_i64 t1 = tcg_temp_new_i64();
 
     if (sign_ext) {
         tcg_gen_ext32s_i64(t0, src1);
@@ -646,8 +646,8 @@ static inline void gen_op_multiply(TCGv dst, TCGv src1, TCGv src2, int sign_ext)
     }
 
     tcg_gen_mul_i64(dst, t0, t1);
-    tcg_temp_free(t0);
-    tcg_temp_free(t1);
+    tcg_temp_free_i64(t0);
+    tcg_temp_free_i64(t1);
 
     tcg_gen_shri_i64(cpu_y, dst, 32);
 #endif
-- 
2.38.1