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Fri, 24 Feb 2023 04:55:46 -0800 (PST) Received: from imammedo.users.ipa.redhat.com ([185.140.112.229]) by smtp.gmail.com with ESMTPSA id j23-20020a05600c1c1700b003c6bbe910fdsm2832581wms.9.2023.02.24.04.55.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 04:55:46 -0800 (PST) Date: Fri, 24 Feb 2023 13:55:45 +0100 From: Igor Mammedov To: Sunil V L Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Andrew Jones , Anup Patel , Atish Kumar Patra , Daniel Henrique Barboza Subject: Re: [PATCH V4 6/8] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table Message-ID: <20230224135545.0df4222f@imammedo.users.ipa.redhat.com> In-Reply-To: <20230224083701.2657063-7-sunilvl@ventanamicro.com> References: <20230224083701.2657063-1-sunilvl@ventanamicro.com> <20230224083701.2657063-7-sunilvl@ventanamicro.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.36; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, 24 Feb 2023 14:06:59 +0530 Sunil V L wrote: > RISC-V ACPI platforms need to provide RISC-V Hart Capabilities > Table (RHCT). Add this to the ACPI tables. > > Signed-off-by: Sunil V L > Reviewed-by: Andrew Jones > --- > hw/riscv/virt-acpi-build.c | 76 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 76 insertions(+) > > diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c > index 8b85b34c55..7037fe7634 100644 > --- a/hw/riscv/virt-acpi-build.c > +++ b/hw/riscv/virt-acpi-build.c > @@ -33,6 +33,7 @@ > #include "migration/vmstate.h" > #include "hw/riscv/virt.h" > #include "hw/riscv/numa.h" > +#include "hw/intc/riscv_aclint.h" > > #define ACPI_BUILD_TABLE_SIZE 0x20000 > > @@ -83,6 +84,78 @@ static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap) > aml_append(scope, dev); > } > > +#define RHCT_NODE_ARRAY_OFFSET 56 same as previous patch, here should be proper comment otherwise reviewer has no clue where to look for reference. > +static void build_rhct(GArray *table_data, > + BIOSLinker *linker, > + RISCVVirtState *s) > +{ > + MachineState *ms = MACHINE(s); > + uint32_t acpi_proc_id = 0; > + int i, socket; > + RISCVCPU *cpu; > + char *isa; > + size_t len, aligned_len; > + uint32_t isa_offset, num_rhct_nodes; > + > + AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id, > + .oem_table_id = s->oem_table_id }; > + > + acpi_table_begin(&table, table_data); > + > + build_append_int_noprefix(table_data, 0x0, 4); /* Reserved */ > + > + /* Time Base Frequency */ > + build_append_int_noprefix(table_data, > + RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ, 8); > + > + /* ISA + N hart info */ > + num_rhct_nodes = 1 + ms->smp.cpus; > + > + /* Number of RHCT nodes*/ > + build_append_int_noprefix(table_data, num_rhct_nodes, 4); > + > + /* Offset to the RHCT node array */ > + build_append_int_noprefix(table_data, RHCT_NODE_ARRAY_OFFSET, 4); > + > + /* ISA string node */ > + isa_offset = table_data->len - table.table_offset; > + build_append_int_noprefix(table_data, 0, 2); /* Type 0 */ > + > + cpu = &s->soc[0].harts[0]; > + isa = riscv_isa_string(cpu); > + len = 8 + strlen(isa) + 1; > + aligned_len = (len % 2) ? (len + 1) : len; > + > + build_append_int_noprefix(table_data, aligned_len, 2); /* Length */ > + build_append_int_noprefix(table_data, 0x1, 2); /* Revision */ > + > + /* ISA string length including NUL */ > + build_append_int_noprefix(table_data, strlen(isa) + 1, 2); > + g_array_append_vals(table_data, isa, strlen(isa) + 1); /* ISA string */ > + > + if (aligned_len != len) { > + build_append_int_noprefix(table_data, 0x0, 1); /* Optional Padding */ > + } > + > + for (socket = 0; socket < riscv_socket_count(ms); socket++) { > + for (i = 0; i < s->soc[socket].num_harts; i++) { > + build_append_int_noprefix(table_data, 0xFFFF, 2); /* Type */ > + build_append_int_noprefix(table_data, 16, 2); /* Length */ > + build_append_int_noprefix(table_data, 0x1, 2); /* Revision */ > + build_append_int_noprefix(table_data, 1, 2); /* Number of offsets */ > + > + /* ACPI Processor UID */ > + build_append_int_noprefix(table_data, acpi_proc_id, 4); > + > + /* Offsets[0] */ > + build_append_int_noprefix(table_data, isa_offset, 4); > + acpi_proc_id++; > + } > + } > + > + acpi_table_end(linker, &table); > +} > + > /* FADT */ > static void build_fadt_rev6(GArray *table_data, > BIOSLinker *linker, > @@ -197,6 +270,9 @@ static void virt_acpi_build(RISCVVirtState *s, AcpiBuildTables *tables) > acpi_add_table(table_offsets, tables_blob); > build_madt(tables_blob, tables->linker, s); > > + acpi_add_table(table_offsets, tables_blob); > + build_rhct(tables_blob, tables->linker, s); > + > /* XSDT is pointed to by RSDP */ > xsdt = tables_blob->len; > build_xsdt(tables_blob, tables->linker, table_offsets, s->oem_id,